Add support for the ixdp465 evaluation board
Signed-off-by: Michael Trimarchi <[EMAIL PROTECTED]>
---
Makefile | 3 +
board/ixdp465/Makefile | 47 ++++++++
board/ixdp465/config.mk | 3 +
board/ixdp465/ixdp465.c | 62 ++++++++++
board/ixdp465/lowlevel_init.S | 129 +++++++++++++++++++++
board/ixdp465/u-boot.lds | 57 +++++++++
include/configs/ixdp465.h | 251 +++++++++++++++++++++++++++++++++++++++++
7 files changed, 552 insertions(+), 0 deletions(-)
create mode 100644 board/ixdp465/Makefile
create mode 100644 board/ixdp465/config.mk
create mode 100644 board/ixdp465/ixdp465.c
create mode 100644 board/ixdp465/lowlevel_init.S
create mode 100644 board/ixdp465/u-boot.lds
create mode 100644 include/configs/ixdp465.h
diff --git a/Makefile b/Makefile
index a7f886b..845b516 100644
--- a/Makefile
+++ b/Makefile
@@ -2555,6 +2555,9 @@ ixdp425_config : unconfig
ixdpg425_config : unconfig
@$(MKCONFIG) $(@:_config=) arm ixp ixdp425
+ixdp465_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm ixp ixdp465
+
lubbock_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa lubbock
diff --git a/board/ixdp465/Makefile b/board/ixdp465/Makefile
new file mode 100644
index 0000000..b822492
--- /dev/null
+++ b/board/ixdp465/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2008
+# Michael Trimarchi, Evidence S.r.l, [EMAIL PROTECTED]
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS := ixdp465.o
+SOBJS := lowlevel_init.o
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $^
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
diff --git a/board/ixdp465/config.mk b/board/ixdp465/config.mk
new file mode 100644
index 0000000..dbfec9c
--- /dev/null
+++ b/board/ixdp465/config.mk
@@ -0,0 +1,3 @@
+TEXT_BASE = 0x01600000
+# include NPE ethernet driver
+BOARDLIBS = $(obj)cpu/ixp/npe/libnpe.a
diff --git a/board/ixdp465/ixdp465.c b/board/ixdp465/ixdp465.c
new file mode 100644
index 0000000..c90841c
--- /dev/null
+++ b/board/ixdp465/ixdp465.c
@@ -0,0 +1,62 @@
+/*
+ * (C) Copyright 2008
+ * Michael Trimarchi, Evidence S.r.l, [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/arch/ixp465.h>
+#include <common.h>
+
+int board_post_init(void)
+{
+ return 0;
+}
+
+int board_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ /* arch number of IXDP */
+ gd->bd->bi_arch_number = MACH_TYPE_IXDP465;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0x00000100;
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ DECLARE_GLOBAL_DATA_PTR;
+
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return 0;
+}
+
+extern struct pci_controller hose;
+
+void pci_init_board(void)
+{
+ extern void pci_ixp_init(struct pci_controller *hose);
+
+ pci_ixp_init(&hose);
+}
diff --git a/board/ixdp465/lowlevel_init.S b/board/ixdp465/lowlevel_init.S
new file mode 100644
index 0000000..ab73c57
--- /dev/null
+++ b/board/ixdp465/lowlevel_init.S
@@ -0,0 +1,129 @@
+/*
+ * Memory Setup stuff - Taken from redboot source code
+ *
+ * (C) Copyright 2008
+ * Michael Trimarchi, Evidence S.r.l, [EMAIL PROTECTED]
+ * Fabio Checconi, [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/ixp465.h>
+
+_TEXT_BASE:
+ .word TEXT_BASE
+
+/* Delay a bit */
+.macro DELAY cycles, reg0
+ ldr \reg0, =\cycles
+ subs \reg0, \reg0, #1
+ subne pc, pc, #0xc
+.endm
+
+/* wait for coprocessor write complete */
+.macro CPWAIT reg
+ mrc p15,0,\reg,c2,c0,0
+ mov \reg,\reg
+ sub pc,pc,#4
+.endm
+
+.globl lowlevel_init
+lowlevel_init:
+
+ /* Setup SDRAM controller */
+ ldr r0, =IXP_DDR_CFG_BASE1
+
+ ldr r1, =IXDP465_SDCR0_INIT
+ str r1, [r0, #IXP_DDR_SDCR0]
+
+ ldr r1, =IXDP465_SDCR1_INIT
+ str r1, [r0, #IXP_DDR_SDCR1]
+
+ mov r1, #IXP425_SDRAM_BASE
+ str r1, [r0, #IXP_DDR_SDBR]
+ /* Readback */
+ ldr r1, [r0, #IXP_DDR_SDBR]
+
+ ldr r1, =IXDP465_SBR0_INIT
+ str r1, [r0, #IXP_DDR_SBR0]
+ ldr r1, [r0, #IXP_DDR_SBR0]
+
+ ldr r1, =IXDP465_SBR1_INIT
+ str r1, [r0, #IXP_DDR_SBR1]
+ ldr r1, [r0, #IXP_DDR_SBR1]
+
+ /* Step 5. Disable refresh cycles */
+ mov r1, #0
+ str r1, [r0, #IXP_DDR_RFR]
+
+ /* Step 6. Send NOP command */
+ mov r1, #DDR_SDIR_NOP
+ str r1, [r0, #IXP_DDR_SDIR]
+ DELAY 0x100000, r1
+
+ /* Step 7. Issue precharge-all command to close all open banks */
+ mov r1, #DDR_SDIR_PRECHARGE_ALL
+ str r1, [r0, #IXP_DDR_SDIR]
+ DELAY 0x100000, r1
+
+ /* Step 8. Issue extended mode register set to enable dll */
+ mov r1, #DDR_SDIR_EMRS_DLL_ENABLE
+ str r1, [r0, #IXP_DDR_SDIR]
+ DELAY 0x100000, r1
+
+ /* Step 9. Issue mode register set w/ DLL reset */
+ mov r1, #DDR_SDIR_MODE_SET_RESET
+ str r1, [r0, #IXP_DDR_SDIR]
+ DELAY 0x100000, r1
+
+ /* Step 10. Issue precharge-all command */
+ mov r1, #DDR_SDIR_PRECHARGE_ALL
+ str r1, [r0, #IXP_DDR_SDIR]
+ DELAY 0x100000, r1
+
+ /* Step 11. provide 2 auto-refresh cycles */
+ mov r1, #DDR_SDIR_AUTO_REFRESH
+ mov r2, #2
+1:
+ str r1, [r0, #IXP_DDR_SDIR]
+ DELAY 0x800, r3
+ subs r2, r2, #1
+ bne 1b
+
+ /* Step 12. Issue mode register set w/o DLL reset */
+ mov r1, #DDR_SDIR_MODE_SET_NO_RESET
+ str r1, [r0, #IXP_DDR_SDIR]
+ DELAY 0x100000, r1
+
+ /* start normal operation */
+ mov r1, #0xf
+ str r1, [r0, #IXP_DDR_SDIR]
+ DELAY 0x10000, r1
+
+ /* Step 14. Set refresh val */
+ ldr r1, =(IXDP465_SDRAM_REFRESH_CNT >> 3)
+ str r1, [r0, #IXP_DDR_RFR]
+ DELAY 0x100000, r1
+
+ /* everything is fine now */
+ mov pc, lr
+
diff --git a/board/ixdp465/u-boot.lds b/board/ixdp465/u-boot.lds
new file mode 100644
index 0000000..d17228c
--- /dev/null
+++ b/board/ixdp465/u-boot.lds
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, [EMAIL PROTECTED]
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-bigarm", "elf32-bigarm", "elf32-bigarm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/ixp/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss (NOLOAD) : { *(.bss) }
+ _end = .;
+}
+
diff --git a/include/configs/ixdp465.h b/include/configs/ixdp465.h
new file mode 100644
index 0000000..06a4166
--- /dev/null
+++ b/include/configs/ixdp465.h
@@ -0,0 +1,251 @@
+/*
+ * (C) Copyright 2006
+ * Trimarchi Michael, Evindence S.r.l.
+ *
+ * Configuation settings for the IXDP465 board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_IXP465 1 /* This is an IXP425 CPU */
+#define CONFIG_IXDP465 1 /* on an IXDP465 Board */
+/*
+ * Ethernet
+ */
+#define CONFIG_IXP4XX_NPE 1 /* include IXP4xx NPE support */
+#define CONFIG_NET_MULTI 1
+#define CONFIG_PHY_ADDR 1 /* NPE0 PHY address */
+#define CONFIG_HAS_ETH1
+#define CONFIG_PHY1_ADDR 0 /* NPE1 PHY address */
+#define CONFIG_MII 1 /* MII PHY management */
+#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers
+ & descriptors */
+
+/***************************************************************
+ * U-boot generic defines start here.
+ ***************************************************************/
+
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 115200
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_PCI
+
+#define CONFIG_PCI
+#define CONFIG_EEPRO100
+
+#define CONFIG_BOOTDELAY 3
+/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5b*/
+#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_IPADDR 10.30.3.204
+#define CONFIG_SERVERIP 10.30.3.72
+#define CONFIG_BOOTCOMMAND "bootm 50040000"
+#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS1,115200"
+#define CONFIG_CMDLINE_TAG
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "ethaddr=00:02:b3:01:01:01\0" \
+ "eth1addr=00:02:b3:02:02:02\0"
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+/* speed to run kgdb serial port */
+#define CONFIG_KGDB_BAUDRATE 115200
+/* which serial port to use */
+#define CONFIG_KGDB_SER_INDEX 2
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x00800000 /* memtest works on */
+#define CFG_MEMTEST_END 0x015fffff /* 4 ... 8 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR 0x00010000 /* default load address */
+
+#define CFG_HZ 3333333 /* spec says 66.666 MHz, but it appears to be 33 */
+ /* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/***************************************************************
+ * Platform/Board specific defines start here.
+ ***************************************************************/
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * select serial console configuration
+ */
+#define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 2 banks of DRAM */
+#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
+
+#define PHYS_FLASH_1 0x50000000 /* Flash Bank #1 */
+#define PHYS_FLASH_SIZE 0x02000000 /* 32 MB */
+#define PHYS_FLASH_BANK_SIZE 0x02000000 /* 32 MB Banks */
+#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors (x1) */
+
+#define CFG_DRAM_BASE 0x00000000
+#define CFG_DRAM_SIZE 0x08000000
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
+
+/*
+ * Expansion bus settings
+ */
+/* CS0 (flash optimum timing) */
+
+/* #define CFG_EXP_CS0 0xbcd23c42 */
+#define EXP_RECOVERY_SHIFT 16
+#define EXP_HOLD_SHIFT 20
+#define EXP_STROBE_SHIFT 22
+#define EXP_SETUP_SHIFT 26
+#define EXP_ADDR_SHIFT 28
+
+#define EXP_BYTE_EN (1 << 0)
+#define EXP_WR_EN (1 << 1)
+#define EXP_WORD_EN (1 << 2)
+#define EXP_SPLT_EN (1 << 3)
+#define EXP_MUX_EN (1 << 4)
+#define EXP_HRDY_POL (1 << 5)
+#define EXP_BYTE_RD16 (1 << 6)
+#define EXP_SYNC_INTEL (1 << 8)
+#define EXP_SZ_32M (1 << 9)
+#define EXP_SZ_512 (0 << 10)
+#define EXP_SZ_1K (1 << 10)
+#define EXP_SZ_2K (2 << 10)
+#define EXP_SZ_4K (3 << 10)
+#define EXP_SZ_8K (4 << 10)
+#define EXP_SZ_16K (5 << 10)
+#define EXP_SZ_32K (6 << 10)
+#define EXP_SZ_64K (7 << 10)
+#define EXP_SZ_128K (8 << 10)
+#define EXP_SZ_256K (9 << 10)
+#define EXP_SZ_512K (10 << 10)
+#define EXP_SZ_1M (11 << 10)
+#define EXP_SZ_2M (12 << 10)
+#define EXP_SZ_4M (13 << 10)
+#define EXP_SZ_8M (14 << 10)
+#define EXP_SZ_16M (15 << 10)
+#define EXP_CYC_INTEL (0 << 14)
+#define EXP_CYC_MOTO (1 << 14)
+#define EXP_CYC_HPI (2 << 14)
+#define EXP_CYC_MICRON (3 << 14)
+#define EXP_RECOVERY_T(x) (((x) & 15) << EXP_RECOVERY_SHIFT)
+#define EXP_HOLD_T(x) (((x) & 3) << EXP_HOLD_SHIFT)
+#define EXP_STROBE_T(x) (((x) & 15) << EXP_STROBE_SHIFT)
+#define EXP_SETUP_T(x) (((x) & 3) << EXP_SETUP_SHIFT)
+#define EXP_ADDR_T(x) (((x) & 3) << EXP_ADDR_SHIFT)
+#define EXP_PAR_EN (1 << 30)
+#define EXP_CS_EN (1 << 31)
+
+#define IXP425_EXP_CS0_INIT 1
+#define CFG_EXP_CS0 \
+ (EXP_ADDR_T(3) | EXP_SETUP_T(3) | EXP_STROBE_T(15) | EXP_HOLD_T(3) | \
+ EXP_RECOVERY_T(15) | EXP_SZ_32M | EXP_WR_EN | EXP_BYTE_RD16 | \
+ EXP_CS_EN)
+
+/*
+ * SDRAM settings
+ */
+#define CFG_SDR_CONFIG 0xd
+#define CFG_SDR_MODE_CONFIG 0x1
+#define CFG_SDRAM_REFRESH_CNT 0x81a
+
+/*
+ * FLASH and environment organization
+ */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
+#define CFG_FLASH_CFI /* The flash is CFI compatible */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+#define CFG_ENV_IS_IN_FLASH 1
+
+#define CFG_FLASH_BANKS_LIST { PHYS_FLASH_1 }
+
+#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
+
+#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+
+#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
+#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x80000)
+#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
+
+/*
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 32
+
+
+#endif /* __CONFIG_H */
+
--
1.5.2.5
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