Hi folks,
Attached is a patch for a few typos I came accross.
Adrian
--
Linux Software Engineer | EuroTech, Inc. | www.eurotech-inc.comdiff -u -ru u-boot-1.3.3-rc2.orig/README u-boot-1.3.3-rc2/README
--- u-boot-1.3.3-rc2.orig/README 2008-04-29 17:41:06.000000000 -0400
+++ u-boot-1.3.3-rc2/README 2008-05-02 08:29:20.000000000 -0400
@@ -623,7 +623,6 @@
CONFIG_CMD_SPI * SPI serial bus support
CONFIG_CMD_USB * USB support
CONFIG_CMD_VFD * VFD support (TRAB)
- CONFIG_CMD_BSP * Board SPecific functions
CONFIG_CMD_CDP * Cisco Discover Protocol support
CONFIG_CMD_FSL * Microblaze FSL support
Only in u-boot-1.3.3-rc2: README.orig
diff -u -ru u-boot-1.3.3-rc2.orig/cpu/arm920t/s3c24x0/usb.c u-boot-1.3.3-rc2/cpu/arm920t/s3c24x0/usb.c
--- u-boot-1.3.3-rc2.orig/cpu/arm920t/s3c24x0/usb.c 2008-04-29 17:41:06.000000000 -0400
+++ u-boot-1.3.3-rc2/cpu/arm920t/s3c24x0/usb.c 2008-05-02 08:29:20.000000000 -0400
@@ -69,4 +69,4 @@
}
# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */
-#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */
+#endif /* defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT) */
diff -u -ru u-boot-1.3.3-rc2.orig/doc/README.nand-boot-ppc440 u-boot-1.3.3-rc2/doc/README.nand-boot-ppc440
--- u-boot-1.3.3-rc2.orig/doc/README.nand-boot-ppc440 2008-04-29 17:41:06.000000000 -0400
+++ u-boot-1.3.3-rc2/doc/README.nand-boot-ppc440 2008-05-02 08:29:20.000000000 -0400
@@ -9,7 +9,7 @@
completely without NOR FLASH. This can be done by using the NAND
boot feature of the 440 NAND flash controller (NDFC).
-Here a short desciption of the different boot stages:
+Here a short description of the different boot stages:
a) IPL (Initial Program Loader, integrated inside CPU)
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