Signed-off-by: Jens Gehrlein <[EMAIL PROTECTED]>
---
board/tqc/tqma31/tqma31.c | 6 +++++
cpu/arm1136/mx31/generic.c | 17 ++++++++++++++
drivers/i2c/mxc_i2c.c | 13 +++++++++++
include/asm-arm/arch-mx31/mx31-regs.h | 32 ++++++++++++++++++++++++++
include/asm-arm/arch-mx31/mx31.h | 1 +
include/configs/TQMA31.h | 40 +++++++++++++++++++++++++++++++++
6 files changed, 109 insertions(+), 0 deletions(-)
diff --git a/board/tqc/tqma31/tqma31.c b/board/tqc/tqma31/tqma31.c
index 7cec8db..0c67af3 100644
--- a/board/tqc/tqma31/tqma31.c
+++ b/board/tqc/tqma31/tqma31.c
@@ -49,6 +49,12 @@ static void setup_iomux (void)
mx31_gpio_mux (MUX_TXD1__UART1_TXD_MUX);
mx31_gpio_mux (MUX_RTS1__UART1_RTS_B);
mx31_gpio_mux (MUX_CTS1__UART1_CTS_B);
+
+ /* Pins for I2C1 */
+ mx31_gpio_mux (MUX_I2C_CLK__I2C1_SCL);
+ mx31_gpio_mux (MUX_I2C_DAT__I2C1_SDA);
+ mx31_pad_ctl (PAD_CTL_I2C_CLK, PAD_CTL_IPP_ODE_OD);
+ mx31_pad_ctl (PAD_CTL_I2C_DAT, PAD_CTL_IPP_ODE_OD);
}
int dram_init (void)
diff --git a/cpu/arm1136/mx31/generic.c b/cpu/arm1136/mx31/generic.c
index bf4c99c..9999e12 100644
--- a/cpu/arm1136/mx31/generic.c
+++ b/cpu/arm1136/mx31/generic.c
@@ -90,6 +90,23 @@ void mx31_gpio_mux(unsigned long mode)
__REG(reg) = tmp;
}
+void mx31_pad_ctl (u32 field, u32 val)
+{
+ u32 reg, shift, mask, tmp;
+
+ /* extract 32 bit register address and shifter for bit field */
+ reg = IOMUXC_BASE + (field >> 8);
+ shift = field & 0xFF;
+
+ /* field consists of 10 bits */
+ mask = 0x3FF << shift;
+
+ tmp = __REG(reg);
+ tmp &= ~mask;
+ tmp |= (val << shift) & mask;
+ __REG(reg) = tmp;
+}
+
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo (void)
{
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 6f9306f..68d2720 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -209,4 +209,17 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buf,
int len)
return 0;
}
+int i2c_get_bus_speed(void)
+{
+ return -1;
+}
+
+int i2c_set_bus_speed (unsigned int speed)
+{
+ if (speed != CFG_I2C_SPEED)
+ return -1;
+
+ return 0;
+}
+
#endif /* CONFIG_HARD_I2C */
diff --git a/include/asm-arm/arch-mx31/mx31-regs.h
b/include/asm-arm/arch-mx31/mx31-regs.h
index ea15108..c0e516f 100644
--- a/include/asm-arm/arch-mx31/mx31-regs.h
+++ b/include/asm-arm/arch-mx31/mx31-regs.h
@@ -168,6 +168,9 @@
#define MUX_CTL_CSPI2_SS2 0x87
#define MUX_CTL_CSPI2_MOSI 0x8b
+#define MUX_CTL_I2C_CLK 0xa2
+#define MUX_CTL_I2C_DAT 0xa3
+
/* The modes a specific pin can be in
* these macros can be used in mx31_gpio_mux() and have the form
* MUX_[contact name]__[pin function]
@@ -180,6 +183,35 @@
#define MUX_CSPI2_MOSI__I2C2_SCL ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MOSI)
#define MUX_CSPI2_MISO__I2C2_SDA ((MUX_CTL_ALT1 << 8) | MUX_CTL_CSPI2_MISO)
+#define MUX_I2C_CLK__I2C1_SCL ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_CLK)
+#define MUX_I2C_DAT__I2C1_SDA ((MUX_CTL_FUNC << 8) | MUX_CTL_I2C_DAT)
+
+/* bits in the SW_PAD_CTL registers */
+#define PAD_CTL_LOOPBACK_DIS (0 << 9)
+#define PAD_CTL_LOOPBACK_ENA (1 << 9)
+#define PAD_CTL_IPP_PUE_DIS (0 << 7)
+#define PAD_CTL_IPP_PUE_KEEPER (2 << 7)
+#define PAD_CTL_IPP_PUE_PULL (3 << 7)
+#define PAD_CTL_IPP_PUS_100K_DN (0 << 5)
+#define PAD_CTL_IPP_PUS_100K_UP (1 << 5)
+#define PAD_CTL_IPP_HYS_STD (0 << 4)
+#define PAD_CTL_IPP_HYS_SCHMITT (1 << 4)
+#define PAD_CTL_IPP_ODE_STD (0 << 3)
+#define PAD_CTL_IPP_ODE_OD (1 << 3)
+#define PAD_CTL_IPP_DSE_STD (0 << 1)
+#define PAD_CTL_IPP_DSE_HIGH (1 << 1)
+#define PAD_CTL_IPP_DSE_MAX (2 << 1)
+#define PAD_CTL_IPP_SRE_SLOW (0 << 0)
+#define PAD_CTL_IPP_SRE_FAST (1 << 0)
+
+/* bit fields in the SW_PAD_CTL registers, offsets based on IOMUXC_BASE */
+#define PAD_CTL_IO1_SHIFT 0
+#define PAD_CTL_IO2_SHIFT 10
+#define PAD_CTL_IO3_SHIFT 20
+#define PAD_CTL_I2C_CLK ((0x21C << 8) |
PAD_CTL_IO2_SHIFT)
+#define PAD_CTL_I2C_DAT ((0x21C << 8) |
PAD_CTL_IO1_SHIFT)
+
+
/*
* Memory regions and CS
*/
diff --git a/include/asm-arm/arch-mx31/mx31.h b/include/asm-arm/arch-mx31/mx31.h
index 0552c27..7b784e6 100644
--- a/include/asm-arm/arch-mx31/mx31.h
+++ b/include/asm-arm/arch-mx31/mx31.h
@@ -26,5 +26,6 @@
extern u32 mx31_get_ipg_clk(void);
extern void mx31_gpio_mux(unsigned long mode);
+extern void mx31_pad_ctl (u32 field, u32 val);
#endif /* __ASM_ARCH_MX31_H */
diff --git a/include/configs/TQMA31.h b/include/configs/TQMA31.h
index 255355d..f96fd74 100644
--- a/include/configs/TQMA31.h
+++ b/include/configs/TQMA31.h
@@ -154,6 +154,43 @@
/*******************************************************************************
+ * I2C
+
******************************************************************************/
+
+/* Use the processor internal controller */
+#define CONFIG_HARD_I2C
+#define CONFIG_I2C_MXC
+
+/* Configure I2C1 */
+#define CFG_I2C_MX31_PORT1
+
+#define CFG_I2C_SPEED 100000
+#define CFG_I2C_SLAVE 0
+
+/* Don't probe these addrs */
+#define CFG_I2C_NOPROBES {0x00}
+
+/* I2C EEPROM, configuration for onboard EEPROM */
+#define CFG_I2C_EEPROM_ADDR 0x50
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+
+/* 32 bytes per write */
+#define CFG_EEPROM_PAGE_WRITE_BITS 5
+
+#define CFG_EEPROM_PAGE_WRITE_ENABLE
+
+/* 10ms +/- 20% */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 12
+
+/* I2C SYSMON (LM75) */
+#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
+#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */
+#define CFG_DTT_MAX_TEMP 70
+#define CFG_DTT_LOW_TEMP -30
+#define CFG_DTT_HYSTERESIS 3
+
+
+/*******************************************************************************
* Commands
******************************************************************************/
@@ -161,6 +198,9 @@
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_EEPROM
/*******************************************************************************
-------------------------------------------------------------------------
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