This actually shouldn't work. Imagina 0xf0000000 base address that
gets translated into 0x1e000 and causes my box to hang. Writing
to 0xf0000000 seems the better way.
Also don't compare against the UPM mask but agaist the MSEL mask.
Cc: Sergei Poselenov <[EMAIL PROTECTED]>
Cc: Andy Fleming <[EMAIL PROTECTED]>
Signed-off-by: Sebastian Siewior <[EMAIL PROTECTED]>
---
cpu/mpc85xx/cpu.c | 7 +++----
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 0497422..2373b4a 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -71,8 +71,7 @@ struct cpu_type *identify_cpu(u32 ver)
static void set_lcb_clock(uint clkdiv)
{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ccsr_lbc_t *lbc= &immap->im_lbc;
+ volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR);
uint lcrr;
lcrr = lbc->lcrr;
@@ -352,8 +351,8 @@ void upmconfig (uint upm, uint * table, uint size)
i++, brp += 2, orp += 2) {
/* Look for a valid BR with selected UPM */
- if ((in_be32(brp) & (BR_V | upmmask)) == (BR_V | upmmask)) {
- dummy = (volatile u8*)(in_be32(brp) >> BR_BA_SHIFT);
+ if ((in_be32(brp) & (BR_V | BR_MSEL)) == (BR_V | upmmask)) {
+ dummy = (volatile u8*)(in_be32(brp) & BR_BA);
break;
}
}
--
1.5.5.2
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