On Tue, Sep 16, 2008 at 10:08:05PM +0530, Tiju wrote:
> Hi Sascha,
>
> > > 2. Is it possible to do a NAND boot on i.mx27ads board with uboot? If so
> > > how
> > can I do it?
> >
> > NAND support (including booting from NAND) has been tested on the
> > phycore i.MX27 module. So the NAND driver inself is in place, only the
> > board specific bits are missing.. You can use board/pcm038 as a template.
>
> Thanks. The network is up now. But when I try to compile using
> pcm038_defconfig (just to test the nand support) some errors are generated by
> the assembler. I am using the compiler from ptxdist.
>
> The command used is:
>
> make ARCH=arm CROSS_COMPILE=/opt/OSELAS.Toolchain-1.1.1/arm-v4t-linux-gnueabi/
> gcc-4.1.2-glibc-2..5-kernel-2.6.18/bin/arm-v4t-linux-gnueabi- pcm038_defconfig
>
> and then when compiled the following errors occur.
>
> ....
> CC drivers/nand/nand_base.o
> {standard input}: Assembler messages:
> {standard input}:4130: Error: selected processor does not support `clz r2,r2'
> {standard input}:4142: Error: selected processor does not support `clz r3,r3'
> {standard input}:4143: Error: selected processor does not support `clz r1,r1'
> make[2]: *** [drivers/nand/nand_base.o] Error 1
> make[1]: *** [drivers/nand] Error 2
> make: *** [drivers] Error 2
>
> Is a different compiler version used in compiling with the nand support or
> anyother changes could solve the problem?
Are you sure you're up to date? it seems like this commit is missing:
commit dd7a74db87297f74c9bb0f57d8ff3df51e89f37e
Author: Sascha Hauer <[EMAIL PROTECTED]>
Date: Tue Sep 2 15:38:46 2008 +0200
ARM bitops: fix for arm arch < 5
The correct bitops implementation depends on __LINUX_ARM_ARCH__ being
set. We do not currently support this variable. Change the default case
to < armv5, so that we do not end up with clz instructions in v4 code.
This is actually a workaround, the correct solution is to set
__LINUX_ARM_ARCH__ correctly.
Signed-off-by: Sascha Hauer <[EMAIL PROTECTED]>
diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h
index b1d34f8..138ebe2 100644
--- a/include/asm-arm/bitops.h
+++ b/include/asm-arm/bitops.h
@@ -115,30 +115,7 @@ extern int _find_next_bit_be(const unsigned long *p, int
size, int offset);
#endif /* __ARMEB__ */
-#if defined(__LINUX_ARM_ARCH__) && (__LINUX_ARM_ARCH__ < 5)
-
-/*
- * ffz = Find First Zero in word. Undefined if no zero exists,
- * so code should check against ~0UL first..
- */
-static inline unsigned long ffz(unsigned long word)
-{
- int k;
-
- word = ~word;
- k = 31;
- if (word & 0x0000ffff) { k -= 16; word <<= 16; }
- if (word & 0x00ff0000) { k -= 8; word <<= 8; }
- if (word & 0x0f000000) { k -= 4; word <<= 4; }
- if (word & 0x30000000) { k -= 2; word <<= 2; }
- if (word & 0x40000000) { k -= 1; }
- return k;
-}
-#include <asm-generic/bitops/__ffs.h>
-#include <asm-generic/bitops/ffs.h>
-#include <asm-generic/bitops/fls.h>
-#else /* ! __ARM__USE_GENERIC_FF */
-
+#if defined(__LINUX_ARM_ARCH__) && (__LINUX_ARM_ARCH__ >= 5)
static inline int constant_fls(int x)
{
int r = 32;
@@ -178,6 +155,27 @@ static inline int constant_fls(int x)
#define ffs(x) ({ unsigned long __t = (x); fls(__t &-__t); })
#define __ffs(x) (ffs(x) - 1)
#define ffz(x) __ffs(~(x))
+#else /* ! __ARM__USE_GENERIC_FF */
+/*
+ * ffz = Find First Zero in word. Undefined if no zero exists,
+ * so code should check against ~0UL first..
+ */
+static inline unsigned long ffz(unsigned long word)
+{
+ int k;
+
+ word = ~word;
+ k = 31;
+ if (word & 0x0000ffff) { k -= 16; word <<= 16; }
+ if (word & 0x00ff0000) { k -= 8; word <<= 8; }
+ if (word & 0x0f000000) { k -= 4; word <<= 4; }
+ if (word & 0x30000000) { k -= 2; word <<= 2; }
+ if (word & 0x40000000) { k -= 1; }
+ return k;
+}
+#include <asm-generic/bitops/__ffs.h>
+#include <asm-generic/bitops/ffs.h>
+#include <asm-generic/bitops/fls.h>
#endif /* __ARM__USE_GENERIC_FF */
#include <asm-generic/bitops/fls64.h>
--
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