Hi all,

I have a card with a MPC8323 and I would like to access a Numonyx Axcell
M29EW FLASH.
After porting the U-Boot 2012.10-rc1 for MPC8323ERDB to my own hardware
I have the following with "flinfo":

Bank # 1: CFI conformant flash (16 x 16)  Size: 256 MB in 2048 Sectors
  AMD Standard command set, Manufacturer ID: 0x89, Device ID: 0x227E4801
  Erase timeout: 4096 ms, write timeout: 2 ms
  Buffer write timeout: 5 ms, buffer size: 1024 bytes

If I digit:

MPC8323=> md 0xa3fffff0
a3fffff0: ffffffff ffffffff ffffffff ffffffff    ................
a4000000:Machine check in kernel mode.
Caused by (from msr): regs 0ff7abf8 Unknown values in msr
NIP: 00001124 XER: 20000000 LR: 0FFDE5A0 REGS: 0ff7abf8 TRAP: 0200 DAR:
00000000
MSR: 00001000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00

GPR00: 0FFDE5A0 0FF7ACE8 0FF7AF30 00000009 00000001 00000004 00000000
00000000
GPR08: 00000000 00000020 00000030 00000000 48024024 0B4EDE9E 00000000
00000000
GPR16: 0FFF79B4 00000000 0FFEBFBC 0FFF13E8 0FFE82A0 0FFF13F0 00000008
A4000000
GPR24: A4000000 0FF7ACF0 0000003C 00000000 00000004 00000004 0FFFC2B0
A4000000
Call backtrace:
0FFDE5A0 0FFC88E0 0FFCC2C8 0FFD1E0C 0FFD1564 0FFD16D4 0FFD3F70
0FFC2560 0FFC0608
machine check
Resetting the board.

This may be related to the Local Bus Controller (LBC) at 26-bits.
So, my question is:

How is it possible to modify u-boot for MPC8323 so the entire flash
memory could be accessed?
Here is the u-boot/include/configs/MPC8323.h related to the flash

/*
 * FLASH on the Local Bus
 */
#define CONFIG_SYS_FLASH_CFI            /* use the Common Flash
Interface */
#define CONFIG_FLASH_CFI_DRIVER         /* use the CFI driver */
#define CONFIG_SYS_FLASH_BASE           0xA0000000      /* FLASH base
address */
#define CONFIG_SYS_FLASH_SIZE           512    
#define CONFIG_SYS_FLASH_PROTECTION     1               /* Use h/w Flash
protection. */

#define CONFIG_SYS_LBLAWBAR0_PRELIM     CONFIG_SYS_FLASH_BASE   /*
Window base at flash base */
#define CONFIG_SYS_LBLAWAR0_PRELIM      0x8000001C

#define CONFIG_SYS_BR0_PRELIM   (CONFIG_SYS_FLASH_BASE |        /* Flash
Base address */ \
                        (2 << BR_PS_SHIFT) |    /* 16 bit port size */ \
                        BR_V)                   /* valid */


#define CONFIG_SYS_OR0_PRELIM           0x00007ff7      /* 512MB Flash
size */

#define CONFIG_SYS_MAX_FLASH_BANKS      1               /* number of
banks */
#define CONFIG_SYS_MAX_FLASH_SECT       2053  /* sectors per device */

#undef CONFIG_SYS_FLASH_CHECKSUM

Thanks in advance for your support.

Best Regards,
Agostino Sette

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