Dear Kumar Gala, In message <[EMAIL PROTECTED]> you wrote: > 01 - Add proper SPD definitions for DDR1/2/3 > 02 - FSL DDR: Provide a generic set_ddr_laws() > 03 - FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. > 04 - FSL DDR: Add DDR1 DIMM paramter support > 05 - FSL DDR: Add DDR2 DIMM paramter support > 06 - FSL DDR: Add 86xx specific register setting > 07 - FSL DDR: Convert MPC8641HPCN to new DDR code. > 08 - FSL DDR: Convert MPC8610HPCD to new DDR code. > 09 - FSL DDR: Convert SBC8641D to new DDR code. > 10 - FSL DDR: Remove old SPD support from cpu/mpc86xx
All applied. > This is the latest spin of the DDR work and hopefully address some of the > comments we discussioned on IRC. > > I've converted ALL 86xx platforms and if these patches are acceptable I'll > go ahead and do the 85xx platforms as a followup. Thanks in advance. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED] Extreme feminine beauty is always disturbing. -- Spock, "The Cloud Minders", stardate 5818.4 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot