On Fri, 29 Aug 2008 20:37:25 +0200
Peter Korsgaard <[EMAIL PROTECTED]> wrote:

> Set gpio level register before direction register to inhibit
> glitches on high level output pins.
> 
> Dir and data gets cleared at powerup, so high level output lines see
> a short low pulse between setting the direction and level registers.
> 
> Issue was seen on a new board with the nReset line of the NOR flash
> connected to a GPIO. Setting the direction register puts the NOR flash
> in reset so the next instruction to set the level cannot get executed.
> 
> Signed-off-by: Peter Korsgaard <[EMAIL PROTECTED]>
> ---

Hi Peter,

this is a duplicate of:

http://www.nabble.com/-U-Boot---PATCH--MPC83XX%3A-Fix-GPIO-configuration-to19119329.html#a19119329

so I'll merge your better description and s-o-b to that one if you
don't mind.

Kim
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