Andy,
You're much more qualified than me to accept or reject this, so if you
don't mind, please pick it up.
regards,
Ben
Peter Tyser wrote:
> Fix TBI PHY accesses to use the proper offset in CPU register space. The
> previous code would incorrectly access the TBI PHY by reading/writing to CPU
> register space at the same location as would be used to access external PHYs.
>
> Signed-off-by: Peter Tyser <[EMAIL PROTECTED]>
> ---
>
> Dohh... v2 of the patch introduced a compile warning. Please apply
> this version instead.
>
> I replaced the hardcoding of CFG_TBIPA_VALUE in the tsec_configure_serdes()
> to support possible changes of the TBI addressing down the road, but
> kept the default TBI PHY address at CFG_TBIPA_VALUE as Andy Flemming
> suggested.
>
> drivers/net/tsec.c | 10 +++++-----
> 1 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
> index f81211a..cc7d528 100644
> --- a/drivers/net/tsec.c
> +++ b/drivers/net/tsec.c
> @@ -283,11 +283,13 @@ uint tsec_local_mdio_read(volatile tsec_t *phyregs,
> uint phyid, uint regnum)
> /* Configure the TBI for SGMII operation */
> static void tsec_configure_serdes(struct tsec_private *priv)
> {
> - tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_ANA,
> + /* Access TBI PHY registers at given TSEC register offset as opposed to
> the
> + * register offset used for external PHY accesses */
> + tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_ANA,
> TBIANA_SETTINGS);
> - tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_TBICON,
> + tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_TBICON,
> TBICON_CLK_SELECT);
> - tsec_local_mdio_write(priv->phyregs, CFG_TBIPA_VALUE, TBI_CR,
> + tsec_local_mdio_write(priv->regs, priv->regs->tbipa, TBI_CR,
> TBICR_SETTINGS);
> }
>
> @@ -299,12 +301,10 @@ static int init_phy(struct eth_device *dev)
> {
> struct tsec_private *priv = (struct tsec_private *)dev->priv;
> struct phy_info *curphy;
> - volatile tsec_t *phyregs = priv->phyregs;
> volatile tsec_t *regs = priv->regs;
>
> /* Assign a Physical address to the TBI */
> regs->tbipa = CFG_TBIPA_VALUE;
> - phyregs->tbipa = CFG_TBIPA_VALUE;
> asm("sync");
>
> /* Reset MII (due to new addresses) */
>
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