Dear Adam Graham, In message <[EMAIL PROTECTED]> you wrote: > This patch add the capability to configure a PPC440 based IBM SDRAM > Controller with static, compiled-in, values. PPC440 memory subsystem > includes a Memory Queue core.
Line too long. > + * This DDR2 setup code can dynamically setup the TLB entries for the DDR2 > + * memory region. Right now the cache should still be disabled in U-Boot > + * because of the EMAC driver, that need it's buffer descriptor to be located Nitpicking: I think this should be "its", not "it's"? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED] "If God had wanted us to use the metric system, Jesus would have had 10 apostles." _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
