Dear Adam Graham,
In message <[EMAIL PROTECTED]> you wrote:
> The Arches Evaluation board is based on the AMCC 460GT SoC chip. This board
> is a dual processor board with each processor providing independent resources
> for Rapid IO, Gigabit Ethernet, and serial communications. Each 460GT has
> it's own 512MB DDR2 mem
> ory, 32MB NOR FLASH, UART, EEPROM and temperature sensor, along with a shared
> debug port. The two 460GT's will communicate with each other via shared
> memory, Gigabit Ethernet and x1 PCI-Express.
>
> Signed-off-by: Adam Graham <[EMAIL PROTECTED]>
> Signed-off-by: Victor Gallardo <[EMAIL PROTECTED]>
> ---
> v2:
> - Added Arches (460GT) support to the existing Canyonlands (460) board
> files since the Canyonlands board files support all current AMCC
> PPC460EX/GT boards.
> v3:
> - Correct tab/spaces in canyonlands.h file.
My comments to the v2 patches still apply.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED]
The moral of the story is: "Don't stop to tighten your shoe laces
during the Olympics 100m finals".
- Kevin Jones in <[EMAIL PROTECTED]>
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