> +/*
> + * Copy the code for other cpus to execute into an
> + * aligned location accessible via BPTR
> + */
> +void setup_mp(void)
> +{
> + extern ulong __secondary_start_page;
> + ulong fixup = (ulong)&__secondary_start_page;
> + u32 bootpg;
> + u32 bootpg_va;
> +
> + /*
> + * If we have 4G or more of memory, put the boot page at 4Gb-1M.
> + * Otherwise, put it at the very end of RAM.
> + */
> + if (gd->ram_size > 0xfffff000)
> + bootpg = 0xfff00000;
> + else
> + bootpg = gd->ram_size - (1024 * 1024);
> +
> + if (bootpg > CONFIG_SYS_MAX_DDR_BAT_SIZE) {
> + /* We're not covered by the DDR mapping, set up BAT */
> + write_bat(DBAT7, CONFIG_SYS_SCRATCH_VA | BATU_BL_128K |
> + BATU_VS | BATU_VP,
> + bootpg | BATL_PP_RW | BATL_MEMCOHERENCE);
> + bootpg_va = CONFIG_SYS_SCRATCH_VA;
> + } else {
> + bootpg_va = bootpg;
> + }
> +
> + memcpy((void *)bootpg_va, (void *)fixup, 4096);
> + flush_cache(bootpg_va, 4096);
> +
> + /* remove the temporary BAT mapping */
> + if (bootpg >= CONFIG_SYS_MAX_DDR_BAT_SIZE)
> + write_bat(DBAT7, 0, 0);
> +
This condition should be >, not >=
> diff --git a/cpu/mpc86xx/release.S b/cpu/mpc86xx/release.S
> + */
> +#if (CONFIG_NUM_CPUS > 1)
> + .align 12
> +.globl __secondary_start_page
> +__secondary_start_page:
> + .space 0x100 /* space over to reset vector loc */
> + mfspr r0, MSSCR0
> + andi. r0, r0, 0x0020
> + rlwinm r0,r0,27,31,31
> + mtspr PIR, r0
> +
> + /* Invalidate BATs */
> + li r0, 0
> + mtspr IBAT0U, r0
> + mtspr IBAT1U, r0
> + mtspr IBAT2U, r0
> + mtspr IBAT3U, r0
> + mtspr IBAT4U, r0
> + mtspr IBAT5U, r0
> + mtspr IBAT6U, r0
> + mtspr IBAT7U, r0
> + isync
> + mtspr DBAT0U, r0
> + mtspr DBAT1U, r0
> + mtspr DBAT2U, r0
> + mtspr DBAT3U, r0
> + mtspr DBAT4U, r0
> + mtspr DBAT5U, r0
> + mtspr DBAT6U, r0
> + mtspr DBAT7U, r0
> + isync
> + sync
I think it is not neccessary, because the MMU is not turned on in
u-boot.
However, kernel should have correct invalidate BAT before MMU on.
> diff --git a/include/configs/MPC8610HPCD.h
> b/include/configs/MPC8610HPCD.h
> index 67b2764..75aa911 100644
> --- a/include/configs/MPC8610HPCD.h
> +++ b/include/configs/MPC8610HPCD.h
> @@ -36,6 +36,12 @@
>
> #define CONFIG_SYS_RESET_ADDRESS 0xfff00100
>
> +/*
> + * virtual address to be used for temporary mappings. There
> + * should be 128k free at this VA.
> + */
> +#define CONFIG_SYS_SCRATCH_VA 0xc0000000
> +
> #define CONFIG_PCI 1 /* Enable PCI/PCIE*/
> #define CONFIG_PCI1 1 /* PCI controler 1 */
> #define CONFIG_PCIE1 1 /* PCIe 1 connected to
> ULI bridge */
> @@ -92,6 +98,7 @@
>
> #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR
> is system memory*/
> #define CONFIG_SYS_SDRAM_BASE
> CONFIG_SYS_DDR_SDRAM_BASE
> +#define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT
> mapping size */
> #define CONFIG_VERY_BIG_RAM
I believe the 8610 processor doesn't support MP.
:)
Thanks,
Dave
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