Hi.
We have designed a new PPC440EP yosemite based board.
But we are using UART 4port tx,rx( 2pin UART0, 1, 2, 3)
But current It only works 2port(UART0, UART1).
I read user manual then changed u-boot's GPIO bit flag blows.
But it's now working, How can I do that?
Thanks in advance
int board_early_init_f(void)
{
...
/*UART1 */
out32(GPIO1_TCR, in32(GPIO1_TCR) | 0x02000000);
out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x00080000);
out32(GPIO1_ISR2L, in32(GPIO1_ISR2L) | 0x00010000)
#if 1 //kscho, UART2, 3(0 based UART) enable
out32(GPIO1_TCR, in32(GPIO1_TCR) | 0x20000000);
out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x00080000)
out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x00080000);
#else
//gpio_config(34, GPIO_OUT, GPIO_ALT3, GPIO_OUT_1);
//gpio_config(35, GPIO_OUT, GPIO_ALT3, GPIO_OUT_1);
//gpio_config(36, GPIO_OUT, GPIO_ALT3, GPIO_OUT_1);
printf("GPIO1_TCR 0x%lx\n", in32(GPIO1_TCR));
out32(GPIO1_TCR, in32(GPIO1_TCR) | 0x24); /* 0010 01 */
printf("### GPIO1_TCR 0x%lx\n", in32(GPIO1_TCR));
//out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0x820); /* 0000 0100 0001 */
printf("GPIO1_OSRL 0x%lx\n", in32(GPIO1_OSRL));
out32(GPIO1_OSRL, in32(GPIO1_OSRL) | 0xC30); /* 0000 1100 0011 */
printf("### GPIO1_OSRL 0x%lx\n", in32(GPIO1_OSRL));
printf("GPIO1_TSRL 0x%lx\n", in32(GPIO1_TSRL));
out32(GPIO1_TSRL, in32(GPIO1_TSRL) & ~0x00000ff0);
printf("### GPIO1_TSRL 0x%lx\n", in32(GPIO1_TSRL));
printf("GPIO1_ISR3L 0x%lx\n", in32(GPIO1_ISR3L));
out32(GPIO1_ISR3L, in32(GPIO1_ISR3L) | 0x00000280); /* 0000 0001
0100 */
printf("### GPIO1_ISR3L 0x%lx\n", in32(GPIO1_ISR3L));
#endi
...
/*------------------------------------------------------------------
--
* Setup other serial configuration
*------------------------------------------------------------------
-*/
mfsdr(sdr_pci0, reg);
mtsdr(sdr_pci0, 0x80000000 | reg); /* PCI arbiter enabled */
mtsdr(sdr_pfc0, 0x00003e00); /* Pin function */
mtsdr(sdr_pfc1, 0x00048000); /* Pin function: UART0 has 4 pins *
}
Best Regards.
Steven.
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