fdt_fixup_esdhc() will either disable or enable eSDHC nodes,
and also will fixup clock-frequency property.

Plus, since DR USB and eSDHC are mutually exclusive, only configure
eSDHC if usb_or_esdhc environment variable is set to 'esdhc'.

Signed-off-by: Anton Vorontsov <[email protected]>
---
 board/freescale/mpc837xemds/mpc837xemds.c |   37 ++++++++++++++++++----------
 1 files changed, 24 insertions(+), 13 deletions(-)

diff --git a/board/freescale/mpc837xemds/mpc837xemds.c 
b/board/freescale/mpc837xemds/mpc837xemds.c
index 376b7f2..1084162 100644
--- a/board/freescale/mpc837xemds/mpc837xemds.c
+++ b/board/freescale/mpc837xemds/mpc837xemds.c
@@ -19,12 +19,13 @@
 #include <libfdt.h>
 #include <fdt_support.h>
 #include <fsl_dr_usb.h>
+#include <fsl_esdhc.h>
+#include <fsl_can_use.h>
 #include "pci.h"
 #include "../common/pq-mds-pib.h"
 
 int board_early_init_f(void)
 {
-       struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
        u8 *bcsr = (u8 *)CONFIG_SYS_BCSR;
 
        /* Enable flash write */
@@ -32,18 +33,6 @@ int board_early_init_f(void)
        /* Clear all of the interrupt of BCSR */
        bcsr[0xe] = 0xff;
 
-#ifdef CONFIG_MMC
-       /* Set SPI_SD, SER_SD, and IRQ4_WP so that SD signals go through */
-       bcsr[0xc] |= 0x4c;
-
-       /* Set proper bits in SICR to allow SD signals through */
-       clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
-
-       clrsetbits_be32(&im->sysconf.sicrh, (SICRH_GPIO2_E | SICRH_SPI),
-                       (SICRH_GPIO2_E_SD | SICRH_SPI_SD));
-
-#endif
-
 #ifdef CONFIG_FSL_SERDES
        immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
        u32 spridr = in_be32(&immr->sysconf.spridr);
@@ -73,6 +62,27 @@ int board_early_init_f(void)
        return 0;
 }
 
+#ifdef CONFIG_FSL_ESDHC
+int board_mmc_init(bd_t *bd)
+{
+       struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR;
+       u8 *bcsr = (u8 *)CONFIG_SYS_BCSR;
+
+       if (!fsl_can_use_esdhc())
+               return 0;
+
+       /* Set SPI_SD, SER_SD, and IRQ4_WP so that SD signals go through */
+       bcsr[0xc] |= 0x4c;
+
+       /* Set proper bits in SICR to allow SD signals through */
+       clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD);
+       clrsetbits_be32(&im->sysconf.sicrh, SICRH_GPIO2_E | SICRH_SPI,
+                       SICRH_GPIO2_E_SD | SICRH_SPI_SD);
+
+       return fsl_esdhc_mmc_init(bd);
+}
+#endif
+
 #if defined(CONFIG_TSEC1) || defined(CONFIG_TSEC2)
 int board_eth_init(bd_t *bd)
 {
@@ -323,6 +333,7 @@ void ft_board_setup(void *blob, bd_t *bd)
        ft_cpu_setup(blob, bd);
        ft_tsec_fixup(blob, bd);
        fdt_fixup_dr_usb(blob, bd);
+       fdt_fixup_esdhc(blob, bd);
 #ifdef CONFIG_PCI
        ft_pci_setup(blob, bd);
        if (board_pci_host_broken())
-- 
1.5.6.5
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