Signed-off-by: Manikandan Pillai <[email protected]>
---
cpu/arm_cortexa8/omap3/board.c | 13 ++++
cpu/arm_cortexa8/omap3/mem.c | 139 +++++++++++++++++++++++++++++++++++-
cpu/arm_cortexa8/omap3/sys_info.c | 27 +++++++-
include/configs/omap3_evm.h | 3 +-
4 files changed, 174 insertions(+), 8 deletions(-)
diff --git a/cpu/arm_cortexa8/omap3/board.c b/cpu/arm_cortexa8/omap3/board.c
index 7bb3e28..ba0eec6 100644
--- a/cpu/arm_cortexa8/omap3/board.c
+++ b/cpu/arm_cortexa8/omap3/board.c
@@ -313,6 +313,19 @@ void abort(void)
{
}
+/******************************************************************************
+ * Routine: print_board_info
+ * Description: Displays cpu and memory information for the board
+ *****************************************************************************/
+void print_board_info(void)
+{
+ u32 btype;
+
+ btype = get_board_type();
+
+ display_board_info(btype);
+}
+
#ifdef CONFIG_NAND_OMAP_GPMC
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
diff --git a/cpu/arm_cortexa8/omap3/mem.c b/cpu/arm_cortexa8/omap3/mem.c
index 3cc22c4..6808eea 100644
--- a/cpu/arm_cortexa8/omap3/mem.c
+++ b/cpu/arm_cortexa8/omap3/mem.c
@@ -26,10 +26,12 @@
*/
#include <common.h>
+#include <environment.h>
#include <asm/io.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <command.h>
+#include <nand.h>
/*
* Only One NAND allowed on board at a time.
@@ -41,7 +43,21 @@ unsigned int boot_flash_sec;
unsigned int boot_flash_type;
volatile unsigned int boot_flash_env_addr;
+#if defined(CONFIG_ENV_IS_RUNTIME_SEL)
+extern env_t *env_ptr;
+extern char *nand_env_name_spec;
+extern char *onenand_env_name_spec;
+extern env_t *nand_env_ptr;
+extern env_t *onenand_env_ptr;
+
+extern void onenand_init(void);
+extern int nand_scan_ident(struct mtd_info *mtd, int maxchips);
+#endif
+
#if defined(CONFIG_CMD_NAND)
+u32 is_nand;
+extern nand_info_t nand_info[2];
+
static u32 gpmc_m_nand[GPMC_MAX_REG] = {
M_NAND_GPMC_CONFIG1,
M_NAND_GPMC_CONFIG2,
@@ -63,6 +79,8 @@ gpmc_t *gpmc_cfg_base;
#endif
#if defined(CONFIG_CMD_ONENAND)
+u32 is_onenand;
+extern struct mtd_info onenand_mtd;
static u32 gpmc_onenand[GPMC_MAX_REG] = {
ONENAND_GPMC_CONFIG1,
ONENAND_GPMC_CONFIG2,
@@ -84,6 +102,24 @@ gpmc_csx_t *onenand_cs_base;
static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE;
+#if defined(CONFIG_ENV_IS_RUNTIME_SEL)
+char *env_name_spec;
+env_get_char_spec_p env_get_char_spec;
+env_init_p env_init;
+saveenv_p saveenv;
+env_relocate_spec_p env_relocate_spec;
+
+extern uchar nand_env_get_char_spec(int index);
+extern int nand_env_init(void);
+extern int nand_saveenv(void);
+extern void nand_env_relocate_spec(void);
+
+extern uchar onenand_env_get_char_spec(int index);
+extern int onenand_env_init(void);
+extern int onenand_saveenv(void);
+extern void onenand_env_relocate_spec(void);
+#endif /* CONFIG_ENV_IS_RUNTIME_SEL */
+
/**************************************************************************
* make_cs1_contiguous() - for es2 and above remap cs1 behind cs0 to allow
* command line mem=xyz use all memory with out discontinuous support
@@ -245,15 +281,15 @@ void gpmc_init(void)
writel(0, &gpmc_cs_base->config7);
sdelay(1000);
-#if defined(CONFIG_CMD_NAND) /* CS 0 */
+#if defined(CONFIG_CMD_NAND) && !defined(CONFIG_ENV_IS_RUNTIME_SEL)
gpmc_config = gpmc_m_nand;
gpmc_cfg_base = gpmc_base;
nand_cs_base = (gpmc_csx_t *)(GPMC_CONFIG_CS0_BASE +
(GPMC_CS * GPMC_CONFIG_WIDTH));
base = PISMO1_NAND_BASE;
size = PISMO1_NAND_SIZE;
- enable_gpmc_config(gpmc_config, nand_cs_base, base, size);
#if defined(CONFIG_ENV_IS_IN_NAND)
+ enable_gpmc_config(gpmc_config, nand_cs_base, base, size);
f_off = SMNAND_ENV_OFFSET;
f_sec = SZ_128K;
/* env setup */
@@ -264,14 +300,14 @@ void gpmc_init(void)
#endif
#endif
-#if defined(CONFIG_CMD_ONENAND)
+#if defined(CONFIG_CMD_ONENAND) && !defined(CONFIG_ENV_IS_RUNTIME_SEL)
gpmc_config = gpmc_onenand;
onenand_cs_base = (gpmc_csx_t *)(GPMC_CONFIG_CS0_BASE +
(GPMC_CS * GPMC_CONFIG_WIDTH));
base = PISMO1_ONEN_BASE;
size = PISMO1_ONEN_SIZE;
- enable_gpmc_config(gpmc_config, onenand_cs_base, base, size);
#if defined(CONFIG_ENV_IS_IN_ONENAND)
+ enable_gpmc_config(gpmc_config, onenand_cs_base, base, size);
f_off = ONENAND_ENV_OFFSET;
f_sec = SZ_128K;
/* env setup */
@@ -281,4 +317,99 @@ void gpmc_init(void)
boot_flash_env_addr = f_off;
#endif
#endif
+
}
+
+/*****************************************************
+ * gpmc_init_late(): init gpmc bus late during initilize
+ * Init GPMC for x16, MuxMode (SDRAM in x32).
+ * This code can only be executed from SRAM or SDRAM.
+ *****************************************************/
+void gpmc_init_late(void)
+{
+ /* putting a blanket check on GPMC based on ZeBu for now */
+ u32 *gpmc_config = NULL;
+ gpmc_t *gpmc_base = (gpmc_t *)GPMC_BASE;
+ gpmc_csx_t *gpmc_cs_base = (gpmc_csx_t *)GPMC_CONFIG_CS0_BASE;
+ u32 base = 0;
+ u32 size = 0;
+ u32 f_off = CONFIG_SYS_MONITOR_LEN;
+ u32 f_sec = 0;
+ u32 config = 0;
+ u32 gpmc_index = 0;
+
+ /* global settings */
+ writel(0, &gpmc_base->irqenable); /* isr's sources masked */
+ writel(0, &gpmc_base->timeout_control);/* timeout disable */
+
+ config = readl(&gpmc_base->config);
+ config &= (~0xf00);
+ writel(config, &gpmc_base->config);
+
+ /*
+ * Disable the GPMC0 config set by ROM code
+ * It conflicts with our MPDB (both at 0x08000000)
+ */
+ writel(0, &gpmc_cs_base->config7);
+ sdelay(1000);
+
+#if defined(CONFIG_CMD_NAND) && defined(CONFIG_ENV_IS_RUNTIME_SEL)
+ gpmc_config = gpmc_m_nand;
+ nand_cs_base = (gpmc_csx_t *)(GPMC_CONFIG_CS0_BASE +
+ (gpmc_index * GPMC_CONFIG_WIDTH));
+ base = PISMO1_NAND_BASE;
+ size = PISMO1_NAND_SIZE;
+ enable_gpmc_config(gpmc_config, nand_cs_base, base, size);
+ /* NAND and/or ONENAND is to be scanned */
+ is_nand = 0;
+ nand_init();
+ if (nand_info[0].size) {
+ is_nand = 1;
+ f_off = SMNAND_ENV_OFFSET;
+ f_sec = SZ_128K;
+ /* env setup */
+ boot_flash_base = base;
+ boot_flash_off = f_off;
+ boot_flash_sec = f_sec;
+ boot_flash_env_addr = f_off;
+
+ env_name_spec = nand_env_name_spec;
+ env_ptr = nand_env_ptr;
+ env_get_char_spec = nand_env_get_char_spec;
+ env_init = nand_env_init;
+ saveenv = nand_saveenv;
+ env_relocate_spec = nand_env_relocate_spec;
+ gpmc_index++;
+ }
+#endif
+
+#if defined(CONFIG_CMD_ONENAND) && defined(CONFIG_ENV_IS_RUNTIME_SEL)
+ gpmc_config = gpmc_onenand;
+ onenand_cs_base = (gpmc_csx_t *)(GPMC_CONFIG_CS0_BASE +
+ (gpmc_index * GPMC_CONFIG_WIDTH));
+ base = PISMO1_ONEN_BASE;
+ size = PISMO1_ONEN_SIZE;
+ enable_gpmc_config(gpmc_config, onenand_cs_base, base, size);
+ /* NAND and/or ONENAND is to be scanned */
+ is_onenand = 0;
+ onenand_init();
+ if (onenand_mtd.size) {
+ is_onenand = 1;
+ f_off = ONENAND_ENV_OFFSET;
+ f_sec = SZ_128K;
+ /* env setup */
+ boot_flash_base = base;
+ boot_flash_off = f_off;
+ boot_flash_sec = f_sec;
+ boot_flash_env_addr = f_off;
+ env_name_spec = onenand_env_name_spec;
+ env_ptr = onenand_env_ptr;
+ env_get_char_spec = onenand_env_get_char_spec;
+ env_init = onenand_env_init;
+ saveenv = onenand_saveenv;
+ env_relocate_spec = onenand_env_relocate_spec;
+ gpmc_index++;
+ }
+#endif
+}
+
diff --git a/cpu/arm_cortexa8/omap3/sys_info.c
b/cpu/arm_cortexa8/omap3/sys_info.c
index 28a1020..86cc95f 100644
--- a/cpu/arm_cortexa8/omap3/sys_info.c
+++ b/cpu/arm_cortexa8/omap3/sys_info.c
@@ -36,6 +36,14 @@ static gpmc_csx_t *gpmc_cs_base = (gpmc_csx_t
*)GPMC_CONFIG_CS0_BASE;
static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE;
static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
+#if defined(CONFIG_CMD_NAND)
+extern u8 is_nand;
+#endif
+
+#if defined(CONFIG_CMD_ONENAND)
+extern u8 is_onenand;
+#endif
+
/******************************************
* get_cpu_type(void) - extract cpu info
******************************************/
@@ -208,9 +216,22 @@ void display_board_info(u32 btype)
printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s,
- sec_s, get_cpu_rev());
- printf("%s + %s/%s\n", sysinfo.board_string,
- mem_s, sysinfo.nand_string);
+ sec_s, get_cpu_rev());
+#if defined(CONFIG_ENV_IS_RUNTIME_SEL)
+ printf("%s + %s/", sysinfo.board_string,
+ mem_s);
+#if defined(CONFIG_CMD_NAND)
+ if (is_nand)
+ printf("%s\n", "NAND");
+#endif
+#if defined(CONFIG_CMD_ONENAND)
+ if (is_onenand)
+ printf("%s\n", "ONENAND");
+#endif
+#else
+ printf("%s + %s/%s\n", sysinfo.board_string,
+ mem_s, sysinfo.nand_string);
+#endif
}
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index f484f14..37e7ad3 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -106,6 +106,7 @@
#define CONFIG_CMD_I2C /* I2C serial bus support */
#define CONFIG_CMD_MMC /* MMC support */
+#define CONFIG_CMD_ONENAND /* ONENAND support */
#define CONFIG_CMD_NAND /* NAND support */
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PING
@@ -271,7 +272,7 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
-#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_IS_RUNTIME_SEL 1
#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
--
1.5.6
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