Hi Andrii,
We are almost there.. minor comments follow:
On 11:42-20130521, Andrii Tseglytskyi wrote:
[...]
> diff --git a/arch/arm/cpu/armv7/omap5/abb.c b/arch/arm/cpu/armv7/omap5/abb.c
> new file mode 100644
> index 0000000..92470be
> --- /dev/null
> +++ b/arch/arm/cpu/armv7/omap5/abb.c
> @@ -0,0 +1,67 @@
I might introduce this as part of patch #2... but no strong feelings
about it.
[...]
> +s8 abb_setup_ldovbb(u32 fuse, u32 ldovbb)
> +{
> + u32 vset;
> +
> + /*
> + * ABB parameters must be properly fused
> + * otherwise ABB should be disabled
> + */
> + vset = readl(fuse);
> + if (!(vset & OMAP5_ABB_FUSE_ENABLE_MASK))
> + return -1;
> +
> + /* prepare VSET value for LDOVBB mux register */
> + vset &= OMAP5_ABB_FUSE_VSET_MASK;
> + vset >>= ffs(OMAP5_ABB_FUSE_VSET_MASK) - 1;
> + vset <<= ffs(OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK) - 1;
> + vset |= OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK;
> +
> + /* setup LDOVBB using fused value */
> + clrsetbits_le32(ldovbb, OMAP5_ABB_LDOVBBMPU_VSET_OUT_MASK, vset);
OMAP5_ABB_LDOVBBMPU_MUX_CTRL_MASK wont get set :(
[...]
Other than this, I have no further comments.
--
Regards,
Nishanth Menon
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