Flag status register polling is required for micron 512Mb flash devices onwards, for performing erase/program operations.
Like polling for WIP(Write-In-Progress) bit in read status register, spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control) bit in flag status register. Signed-off-by: Jagannadha Sutradharudu Teki <[email protected]> --- Changes for v2: - none drivers/mtd/spi/spi_flash.c | 15 ++++++++++++--- drivers/mtd/spi/spi_flash_internal.h | 3 +++ 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index 527423d..8cd2988 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -195,25 +195,34 @@ int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) unsigned long timebase; int ret; u8 status; + u8 check_status = 0x0; u8 poll_bit = STATUS_WIP; u8 cmd = CMD_READ_STATUS; + if ((flash->idcode0 == 0x20) && + (flash->size >= SPI_FLASH_512MB_STMIC)) { + poll_bit = STATUS_PEC; + check_status = poll_bit; + cmd = CMD_FLAG_STATUS; + } + timebase = get_timer(0); do { WATCHDOG_RESET(); ret = spi_flash_read_common(flash, &cmd, 1, &status, 1); if (ret < 0) { - debug("SF: fail to read read status register\n"); + debug("SF: fail to read %s status register\n", + cmd == CMD_READ_STATUS ? "read" : "flag"); return ret; } - if ((status & poll_bit) == 0) + if ((status & poll_bit) == check_status) break; } while (get_timer(timebase) < timeout); - if ((status & poll_bit) == 0) + if ((status & poll_bit) == check_status) return 0; /* Timed out */ diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index ac4530f..cb7a505 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -13,6 +13,7 @@ #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ) #define SPI_FLASH_16MB_BOUN 0x1000000 +#define SPI_FLASH_512MB_STMIC 0x4000000 /* Common commands */ #define CMD_READ_ID 0x9f @@ -24,6 +25,7 @@ #define CMD_PAGE_PROGRAM 0x02 #define CMD_WRITE_DISABLE 0x04 #define CMD_READ_STATUS 0x05 +#define CMD_FLAG_STATUS 0x70 #define CMD_WRITE_ENABLE 0x06 #define CMD_ERASE_4K 0x20 #define CMD_ERASE_32K 0x52 @@ -38,6 +40,7 @@ /* Common status */ #define STATUS_WIP 0x01 +#define STATUS_PEC 0x80 /* Send a single-byte command to the device and read the response */ int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len); -- 1.8.3 _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
