Hi, I think this needs to send as v3, as Simon sent v2 for this. http://patchwork.ozlabs.org/patch/243139/
-- Thanks, Jagan. On Thu, May 30, 2013 at 12:01 PM, Rajeshwari Shinde <rajeshwar...@samsung.com> wrote: > This patch implements a custom spi_copy funtion to copy u-boot from SF > to RAM. This is faster then iROM spi_copy funtion as this runs spi at > 50Mhz and also in WORD mode of operation. > > Changed a printf in pinmux.c to debug just to avoid the compilation > error in SPL. > Removed enum for boot mode from spl_boot.c as it was already define > in spl.h > > Based on "[PATCH V2] spi: exynos: Support word transfers" > > Signed-off-by: Alim Akhtar <alim.akh...@samsung.com> > Signed-off-by: Tom Wai-Hong Tam <waih...@chromium.org> > Signed-off-by: Rajeshwari Shinde <rajeshwar...@samsung.com> > --- > Changes in V2: > - Corrected the commit message. > - Added a SPI timeout check. > - Corrected the comments. > arch/arm/cpu/armv7/exynos/pinmux.c | 2 +- > arch/arm/include/asm/arch-exynos/spi.h | 2 + > board/samsung/smdk5250/spl_boot.c | 136 ++++++++++++++++++++++++++++--- > include/configs/exynos5250-dt.h | 3 + > spl/Makefile | 4 + > 5 files changed, 132 insertions(+), 15 deletions(-) > > diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c > b/arch/arm/cpu/armv7/exynos/pinmux.c > index bd499b4..c484a86 100644 > --- a/arch/arm/cpu/armv7/exynos/pinmux.c > +++ b/arch/arm/cpu/armv7/exynos/pinmux.c > @@ -427,7 +427,7 @@ static int exynos4_pinmux_config(int peripheral, int > flags) > case PERIPH_ID_SDMMC1: > case PERIPH_ID_SDMMC3: > case PERIPH_ID_SDMMC4: > - printf("SDMMC device %d not implemented\n", peripheral); > + debug("SDMMC device %d not implemented\n", peripheral); > return -1; > default: > debug("%s: invalid peripheral %d", __func__, peripheral); > diff --git a/arch/arm/include/asm/arch-exynos/spi.h > b/arch/arm/include/asm/arch-exynos/spi.h > index e67ad27..3430ac1 100644 > --- a/arch/arm/include/asm/arch-exynos/spi.h > +++ b/arch/arm/include/asm/arch-exynos/spi.h > @@ -43,6 +43,8 @@ struct exynos_spi { > > #define SPI_TIMEOUT_MS 10 > > +#define SF_READ_DATA_CMD 0x3 > + > /* SPI_CHCFG */ > #define SPI_CH_HS_EN (1 << 6) > #define SPI_CH_RST (1 << 5) > diff --git a/board/samsung/smdk5250/spl_boot.c > b/board/samsung/smdk5250/spl_boot.c > index c0bcf46..85a5d68 100644 > --- a/board/samsung/smdk5250/spl_boot.c > +++ b/board/samsung/smdk5250/spl_boot.c > @@ -22,17 +22,13 @@ > > #include<common.h> > #include<config.h> > +#include <asm/arch/clk.h> > +#include <asm/arch/spi.h> > +#include <asm/arch/pinmux.h> > +#include <asm/arch/periph.h> > +#include <asm/arch/spl.h> > > -enum boot_mode { > - BOOT_MODE_MMC = 4, > - BOOT_MODE_SERIAL = 20, > - /* Boot based on Operating Mode pin settings */ > - BOOT_MODE_OM = 32, > - BOOT_MODE_USB, /* Boot using USB download */ > -}; > - > - typedef u32 (*spi_copy_func_t)(u32 offset, u32 nblock, u32 dst); > - typedef u32 (*usb_copy_func_t)(void); > +typedef u32 (*usb_copy_func_t)(void); > > /* > * Set/clear program flow prediction and return the previous state. > @@ -48,6 +44,119 @@ static int config_branch_prediction(int set_cr_z) > return cr & CR_Z; > } > > +static void spi_rx_tx(struct exynos_spi *regs, int todo, > + void *dinp, void const *doutp, int i) > +{ > + uint *rxp = (uint *)(dinp + (i * (32 * 1024))); > + int rx_lvl, tx_lvl; > + uint out_bytes, in_bytes; > + > + out_bytes = todo; > + in_bytes = todo; > + setbits_le32(®s->ch_cfg, SPI_CH_RST); > + clrbits_le32(®s->ch_cfg, SPI_CH_RST); > + writel(((todo * 8) / 32) | SPI_PACKET_CNT_EN, ®s->pkt_cnt); > + > + while (in_bytes) { > + uint32_t spi_sts; > + int temp; > + > + spi_sts = readl(®s->spi_sts); > + rx_lvl = ((spi_sts >> 15) & 0x7f); > + tx_lvl = ((spi_sts >> 6) & 0x7f); > + while (tx_lvl < 32 && out_bytes) { > + temp = 0xffffffff; > + writel(temp, ®s->tx_data); > + out_bytes -= 4; > + tx_lvl += 4; > + } > + while (rx_lvl >= 4 && in_bytes) { > + temp = readl(®s->rx_data); > + if (rxp) > + *rxp++ = temp; > + in_bytes -= 4; > + rx_lvl -= 4; > + } > + } > +} > + > +/* > +* Copy uboot from spi flash to RAM > +* > +* @parma uboot_size size of u-boot to copy > +* @param uboot_addr address in u-boot to copy > +*/ > +static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr) > +{ > + int upto, todo; > + int i, timeout = 100; > + struct exynos_spi *regs = (struct exynos_spi *)CONFIG_ENV_SPI_BASE; > + > + set_spi_clk(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ > + /* set the spi1 GPIO */ > + exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE); > + > + /* set pktcnt and enable it */ > + writel(4 | SPI_PACKET_CNT_EN, ®s->pkt_cnt); > + /* set FB_CLK_SEL */ > + writel(SPI_FB_DELAY_180, ®s->fb_clk); > + /* set CH_WIDTH and BUS_WIDTH as word */ > + setbits_le32(®s->mode_cfg, SPI_MODE_CH_WIDTH_WORD | > + SPI_MODE_BUS_WIDTH_WORD); > + clrbits_le32(®s->ch_cfg, SPI_CH_CPOL_L); /* CPOL: active high */ > + > + /* clear rx and tx channel if set priveously */ > + clrbits_le32(®s->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON); > + > + setbits_le32(®s->swap_cfg, SPI_RX_SWAP_EN | > + SPI_RX_BYTE_SWAP | > + SPI_RX_HWORD_SWAP); > + > + /* do a soft reset */ > + setbits_le32(®s->ch_cfg, SPI_CH_RST); > + clrbits_le32(®s->ch_cfg, SPI_CH_RST); > + > + /* now set rx and tx channel ON */ > + setbits_le32(®s->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON | > SPI_CH_HS_EN); > + clrbits_le32(®s->cs_reg, SPI_SLAVE_SIG_INACT); /* CS low */ > + > + /* Send read instruction (0x3h) followed by a 24 bit addr */ > + writel((SF_READ_DATA_CMD << 24) | SPI_FLASH_UBOOT_POS, > ®s->tx_data); > + > + /* waiting for TX done */ > + while (!(readl(®s->spi_sts) & SPI_ST_TX_DONE)) { > + if (!timeout) { > + debug("SPI TIMEOUT\n"); > + break; > + } > + timeout--; > + } > + > + for (upto = 0, i = 0; upto < uboot_size; upto += todo, i++) { > + todo = min(uboot_size - upto, (1 << 15)); > + spi_rx_tx(regs, todo, (void *)(uboot_addr), > + (void *)(SPI_FLASH_UBOOT_POS), i); > + } > + > + setbits_le32(®s->cs_reg, SPI_SLAVE_SIG_INACT);/* make the CS high > */ > + > + /* > + * Let put controller mode to BYTE as > + * SPI driver does not support WORD mode yet > + */ > + clrbits_le32(®s->mode_cfg, SPI_MODE_CH_WIDTH_WORD | > + SPI_MODE_BUS_WIDTH_WORD); > + writel(0, ®s->swap_cfg); > + > + /* > + * Flush spi tx, rx fifos and reset the SPI controller > + * and clear rx/tx channel > + */ > + clrsetbits_le32(®s->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST); > + clrbits_le32(®s->ch_cfg, SPI_CH_RST); > + clrbits_le32(®s->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON); > +} > + > /* > * Copy U-boot from mmc to RAM: > * COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains > @@ -55,13 +164,13 @@ static int config_branch_prediction(int set_cr_z) > */ > void copy_uboot_to_ram(void) > { > - spi_copy_func_t spi_copy; > usb_copy_func_t usb_copy; > > int is_cr_z_set; > unsigned int sec_boot_check; > enum boot_mode bootmode = BOOT_MODE_OM; > u32 (*copy_bl2)(u32, u32, u32); > + struct spl_machine_param *param = spl_get_machine_params(); > > /* Read iRAM location to check for secondary USB boot mode */ > sec_boot_check = readl(EXYNOS_IRAM_SECONDARY_BASE); > @@ -73,9 +182,8 @@ void copy_uboot_to_ram(void) > > switch (bootmode) { > case BOOT_MODE_SERIAL: > - spi_copy = *(spi_copy_func_t *)EXYNOS_COPY_SPI_FNPTR_ADDR; > - spi_copy(SPI_FLASH_UBOOT_POS, CONFIG_BL2_SIZE, > - CONFIG_SYS_TEXT_BASE); > + /* Customised function to copy u-boot from SF */ > + exynos_spi_copy(param->uboot_size, CONFIG_SYS_TEXT_BASE); > break; > case BOOT_MODE_MMC: > copy_bl2 = (void *) *(u32 *)COPY_BL2_FNPTR_ADDR; > diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h > index d78b892..c759ad2 100644 > --- a/include/configs/exynos5250-dt.h > +++ b/include/configs/exynos5250-dt.h > @@ -152,6 +152,8 @@ > > /* MMC SPL */ > #define CONFIG_SPL > +#define CONFIG_SPL_GPIO_SUPPORT > + > #define COPY_BL2_FNPTR_ADDR 0x02020030 > > /* specific .lds file */ > @@ -306,6 +308,7 @@ > #define CONFIG_ENV_SPI_MODE SPI_MODE_0 > #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE > #define CONFIG_ENV_SPI_BUS 1 > +#define CONFIG_ENV_SPI_BASE 0x12D30000 > #define CONFIG_ENV_SPI_MAX_HZ 50000000 > #endif > > diff --git a/spl/Makefile b/spl/Makefile > index 8b655c4..974cc06 100644 > --- a/spl/Makefile > +++ b/spl/Makefile > @@ -102,6 +102,10 @@ ifneq ($(CONFIG_MX23)$(CONFIG_MX35),) > LIBS-y += arch/$(ARCH)/imx-common/libimx-common.o > endif > > +ifneq ($(CONFIG_EXYNOS4)$(CONFIG_EXYNOS5),) > +LIBS-y += $(CPUDIR)/s5p-common/libs5p-common.o > +endif > + > # Add GCC lib > ifeq ("$(USE_PRIVATE_LIBGCC)", "yes") > PLATFORM_LIBGCC = $(SPLTREE)/arch/$(ARCH)/lib/libgcc.o > -- _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot