On Wed, Jun 12, 2013 at 3:42 PM, Simon Glass <s...@chromium.org> wrote:
> Hi Jagan, > > On Tue, Jun 11, 2013 at 12:23 PM, Jagannadha Sutradharudu Teki < > jagannadha.sutradharudu-t...@xilinx.com> wrote: > >> Flag status register polling is required for micron 512Mb flash >> devices onwards, for performing erase/program operations. >> >> Like polling for WIP(Write-In-Progress) bit in read status register, >> spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control) >> bit in flag status register. >> >> Signed-off-by: Jagannadha Sutradharudu Teki <jaga...@xilinx.com> > > --- >> Changes for v3: >> - define the flag status code on CONFIG_SPI_FLASH_STMICRO >> Changes for v2: >> - none >> >> drivers/mtd/spi/spi_flash.c | 16 +++++++++++++--- >> drivers/mtd/spi/spi_flash_internal.h | 2 ++ >> 2 files changed, 15 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c >> index bb37f54..4f97fab0 100644 >> --- a/drivers/mtd/spi/spi_flash.c >> +++ b/drivers/mtd/spi/spi_flash.c >> @@ -200,12 +200,22 @@ int spi_flash_cmd_wait_ready(struct spi_flash >> *flash, unsigned long timeout) >> unsigned long timebase; >> int ret; >> u8 status; >> + u8 check_status = 0x0; >> u8 poll_bit = STATUS_WIP; >> u8 cmd = CMD_READ_STATUS; >> >> +#ifdef CONFIG_SPI_FLASH_STMICRO >> + if (flash->size >= 0x4000000) { >> + poll_bit = STATUS_PEC; >> + check_status = poll_bit; >> + cmd = CMD_FLAG_STATUS; >> + } >> +#endif >> + >> > > Similarly to the bank addressing I think this might be better done as a > 'poll method' rather than a hack for a particular flash type. > > Also I worry that in a system with more than one type of flash, this code > will fire for all flash types. > Also just a note that I tested this series on snow and it seems to have no ill effects. The series: Tested-by: Simon Glass <s...@chromium.org> > Regards, > Simon > >
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