Re: [U-Boot] [RFC PATCH] arm: arm926ejs: flush cache before disable it

[Bo Shen]

Hi Albert,

于 7/6/2013 5:02 AM, Albert ARIBAUD 写道:
Hi Bo,
On Tue,  2 Jul 2013 12:35:54 +0000, Bo Shen <voice.s...@gmail.com>
wrote:

flush cache before disable it

Signed-off-by: Bo Shen <voice.s...@gmail.com>
---
  arch/arm/cpu/arm926ejs/cpu.c |    5 ++---
  1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/cpu.c b/arch/arm/cpu/arm926ejs/cpu.c
index 626384c..10aa165 100644
--- a/arch/arm/cpu/arm926ejs/cpu.c
+++ b/arch/arm/cpu/arm926ejs/cpu.c
@@ -46,15 +46,14 @@ int cleanup_before_linux (void)

        disable_interrupts ();

+       /* flush I/D-cache */
+       cache_flush();

        /* turn off I/D-cache */
        icache_disable();
        dcache_disable();
        l2_cache_disable();

-       /* flush I/D-cache */
-       cache_flush();
-
        return 0;
  }

What is this change supposed to fix?

Actually, this is not a issue fix. Maybe my understanding wrong. I think 
this is just a logic issue. If the cache is disable, then we flush it, 
will the contents in the cache corrupted?

There is no need to flush before
disabling, and actually, flushing before disabling runs the risk that
between the two, some cache lines be dirtied again so that cache and
memory won't be coherent any more.

I am not fully understand this. In my mind, I think flush cache (writing 
the dirty data back to memory) is used to keep the coherence. If my 
understanding is not correct, please help give more explaination or some 
reference document to me for understanding.

Thanks.

Amicalement,

Best Regards,
Bo Shen
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