From: Fabio Estevam <fabio.este...@freescale.com>
Fix the following checkpatch warning:
$ ./tools/checkpatch.pl -F board/freescale/mx28evk/mx28evk.c
CHECK: Alignment should match open parenthesis
#109: FILE: freescale/mx28evk/mx28evk.c:109:
+ writel(CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN,
+ &clkctrl_regs->hw_clkctrl_enet);
Signed-off-by: Fabio Estevam <fabio.este...@freescale.com>
---
board/freescale/mx28evk/mx28evk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/mx28evk/mx28evk.c
b/board/freescale/mx28evk/mx28evk.c
index a307f27..3abf1fd 100644
--- a/board/freescale/mx28evk/mx28evk.c
+++ b/board/freescale/mx28evk/mx28evk.c
@@ -106,7 +106,7 @@ int board_eth_init(bd_t *bis)
/* MX28EVK uses ENET_CLK PAD to drive FEC clock */
writel(CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN,
- &clkctrl_regs->hw_clkctrl_enet);
+ &clkctrl_regs->hw_clkctrl_enet);
/* Power-on FECs */
gpio_direction_output(MX28_PAD_SSP1_DATA3__GPIO_2_15, 0);
--
1.8.1.2
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