Hi TC, Sorry for the delay, but I was the original complainer about this issue and finally got a chance to try it out.
Timur Tabi wrote: > On Thu, Apr 9, 2009 at 11:18 AM, Tsi-Chung Liew > <[email protected]> wrote: >> From: TsiChung Liew <[email protected]> >> >> Implement formula to obtain I2C speed and internal bus >> divider. This will provide accurate divider than fix table >> divider value. > > Can you prove this statement? And the code and boot message thinks it is 390 KHz U-Boot 2009.03dvl-00089-g61e51f7 (Apr 15 2009 - 11:20:06) CPU: Freescale ColdFire MCF5270 rev. 1, at 150 MHz I2C: 390 kHz, ready [snip] => i2c speed Current bus speed=390625 My probed i2c clock changes from 390KHz (with my patch) to 2MHz with your patch (the ideal being 400KHz) so NAK from me as well. - Richard _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
