On 15:48 Mon 13 Apr , Nishanth Menon wrote: > NAND CS is assumed to be CS0 while we could have > choice b/w 0 to 7. This patch enables board files > to handle varied CS on a need basis. > > Signed-off-by: Nishanth Menon <[email protected]> > --- > cpu/arm_cortexa8/omap3/mem.c | 8 +------- > include/asm-arm/arch-omap3/mem.h | 8 ++++++++ > 2 files changed, 9 insertions(+), 7 deletions(-) > > diff --git a/cpu/arm_cortexa8/omap3/mem.c b/cpu/arm_cortexa8/omap3/mem.c > index 14cd87d..9c90f32 100644 > --- a/cpu/arm_cortexa8/omap3/mem.c > +++ b/cpu/arm_cortexa8/omap3/mem.c > @@ -54,12 +54,6 @@ static u32 gpmc_m_nand[GPMC_MAX_REG] = { > gpmc_csx_t *nand_cs_base; > gpmc_t *gpmc_cfg_base; > > -#if defined(CONFIG_ENV_IS_IN_NAND) > -#define GPMC_CS 0 > -#else > -#define GPMC_CS 1 > -#endif > - > #endif > > #if defined(CONFIG_CMD_ONENAND) > @@ -249,7 +243,7 @@ void gpmc_init(void) > gpmc_config = gpmc_m_nand; > gpmc_cfg_base = gpmc_base; > nand_cs_base = (gpmc_csx_t *)(GPMC_CONFIG_CS0_BASE + > - (GPMC_CS * GPMC_CONFIG_WIDTH)); > + (NAND_GPMC_CS * GPMC_CONFIG_WIDTH)); > base = PISMO1_NAND_BASE; > size = PISMO1_NAND_SIZE; > enable_gpmc_config(gpmc_config, nand_cs_base, base, size); > diff --git a/include/asm-arm/arch-omap3/mem.h > b/include/asm-arm/arch-omap3/mem.h > index 622578e..1c4abe7 100644 > --- a/include/asm-arm/arch-omap3/mem.h > +++ b/include/asm-arm/arch-omap3/mem.h > @@ -216,6 +216,14 @@ typedef enum { > /* max number of GPMC regs */ > #define GPMC_MAX_REG 7 > > +#if defined(CONFIG_ENV_IS_IN_NAND) > +#define NAND_GPMC_CS 0 please use CONFIG_SYS_
Best Regards, J. _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
