Hi Måns,

On Tue, 15 Oct 2013 17:29:24 +0100, Måns Rullgård <[email protected]>
wrote:

> Albert ARIBAUD <[email protected]> writes:
> 
> > Hi Måns,
> >
> > On Tue, 15 Oct 2013 16:23:44 +0100, Måns Rullgård <[email protected]>
> > wrote:
> >
> >> On the compiler side, gcc traditionally did not issue unaligned
> >> load/store instructions on ARM.
> >
> > Please be specific: gcc did not emit *native* unaligned accesses.
> 
> Please explain what you mean by "native unaligned access".

By this I mean an unaligned access performed with a single transfer,
initiated by a single processor instruction, as opposed to an
unaligned access performed  with a series of smaller, aligned,
transfers (and possibly additional operations) initiated by a sequence
of processor instructions (emulated, if you will).

Prior to 4.7, gcc did emit unaligned accesses if instructed to at the
source code level; they were however emulated. From 4.7 onward, it was
possible to choose whether unaligned transfers should be performed
native or emulated, the default being native for ARMv6+, and emulated
for the rest.

Amicalement,
-- 
Albert.
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