T4240QDS eSDHC host capabilities reigster should have VS33 bit define.
Add quirk CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 to deal with capacity
missing
Signed-off-by: Roy Zang <tie-fei.z...@freescale.com>
Signed-off-by: Haijun Zhang <haijun.zh...@freescale.com>
---
changes for V2:
- Limited the change to T4240QDS only
arch/powerpc/include/asm/config_mpc85xx.h | 3 +++
drivers/mmc/fsl_esdhc.c | 6 ++++++
2 files changed, 9 insertions(+)
diff --git a/arch/powerpc/include/asm/config_mpc85xx.h
b/arch/powerpc/include/asm/config_mpc85xx.h
index 946ea97..2f54aeb 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -557,6 +557,9 @@
#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
#ifdef CONFIG_PPC_T4240
+#ifdef CONFIG_T4240QDS
+#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
+#endif
#define CONFIG_MAX_CPUS 12
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4 }
#define CONFIG_SYS_NUM_FM1_DTSEC 8
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index d4c1eef..b8b2907 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -545,6 +545,12 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg
*cfg)
caps = caps & ~(ESDHC_HOSTCAPBLT_SRS |
ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
#endif
+
+/* T4240 host controller capabilities register should have VS33 bit */
+#ifdef CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
+ caps = caps | ESDHC_HOSTCAPBLT_VS33;
+#endif
+
if (caps & ESDHC_HOSTCAPBLT_VS18)
voltage_caps |= MMC_VDD_165_195;
if (caps & ESDHC_HOSTCAPBLT_VS30)
--
1.8.4
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