Fix clock value initialisation for Exynos other than Exynos5 for hsi2c.
Signed-off-by: Piotr Wilczek <p.wilc...@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.p...@samsung.com>
Cc: Minkyu Kang <mk7.k...@samsung.com>
Cc: Heiko Schocher <h...@denx.de>
---
drivers/i2c/s3c24x0_i2c.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
index 5dc35e7..1e9dba0 100644
--- a/drivers/i2c/s3c24x0_i2c.c
+++ b/drivers/i2c/s3c24x0_i2c.c
@@ -303,8 +303,10 @@ static int hsi2c_get_clk_details(struct s3c24x0_i2c_bus
*i2c_bus)
unsigned int i = 0, utemp0 = 0, utemp1 = 0;
unsigned int t_ftl_cycle;
-#if defined CONFIG_EXYNOS5
+#if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5)
clkin = get_i2c_clk();
+#else
+ clkin = get_PCLK();
#endif
/* FPCLK / FI2C =
* (CLK_DIV + 1) * (TSCLK_L + TSCLK_H + 2) + 8 + 2 * FLT_CYCLE
--
1.7.9.5
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