There's no point in having of "dwmmc.h" per architecure - we're talking
about device driver (DesignWare MMC controller) which is expected to
work with any CPU it is attached to.

So defines used for DW MMC configuration should be in its own header
which is avaialble for everybody.

Signed-off-by: Alexey Brodkin <abrod...@synopsys.com>

Cc: Mischa Jonker <mjon...@synopsys.com>
Cc: Alexey Brodkin <abrod...@synopsys.com>
Cc: Jaehoon Chung <jh80.ch...@samsung.com>
Cc: Andy Fleming <aflem...@gmail.com>
Cc: Alim Akhtar <alim.akh...@samsung.com>
Cc: Rajeshwari Shinde <rajeshwar...@samsung.com>
Cc: Simon Glass <s...@chromium.org>
Cc: Pantelis Antoniou <pa...@antoniou-consulting.com>
---
 arch/arm/include/asm/arch-exynos/dwmmc.h | 22 ----------------------
 drivers/mmc/dw_mmc.c                     |  1 -
 include/dwmmc.h                          | 22 ++++++++++++++++++++++
 3 files changed, 22 insertions(+), 23 deletions(-)

diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h 
b/arch/arm/include/asm/arch-exynos/dwmmc.h
index d1c5d4f..da66e25 100644
--- a/arch/arm/include/asm/arch-exynos/dwmmc.h
+++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
@@ -5,28 +5,6 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
-#define DWMCI_CLKSEL           0x09C
-#define DWMCI_SHIFT_0          0x0
-#define DWMCI_SHIFT_1          0x1
-#define DWMCI_SHIFT_2          0x2
-#define DWMCI_SHIFT_3          0x3
-#define DWMCI_SET_SAMPLE_CLK(x)        (x)
-#define DWMCI_SET_DRV_CLK(x)   ((x) << 16)
-#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
-
-#define EMMCP_MPSBEGIN0                0x1200
-#define EMMCP_SEND0            0x1204
-#define EMMCP_CTRL0            0x120C
-
-#define MPSCTRL_SECURE_READ_BIT                (0x1<<7)
-#define MPSCTRL_SECURE_WRITE_BIT       (0x1<<6)
-#define MPSCTRL_NON_SECURE_READ_BIT    (0x1<<5)
-#define MPSCTRL_NON_SECURE_WRITE_BIT   (0x1<<4)
-#define MPSCTRL_USE_FUSE_KEY           (0x1<<3)
-#define MPSCTRL_ECB_MODE               (0x1<<2)
-#define MPSCTRL_ENCRYPTION             (0x1<<1)
-#define MPSCTRL_VALID                  (0x1<<0)
-
 #ifdef CONFIG_OF_CONTROL
 int exynos_dwmmc_init(const void *blob);
 #endif
diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
index 1e0f72b..2638c3f 100644
--- a/drivers/mmc/dw_mmc.c
+++ b/drivers/mmc/dw_mmc.c
@@ -11,7 +11,6 @@
 #include <mmc.h>
 #include <dwmmc.h>
 #include <asm-generic/errno.h>
-#include <asm/arch/dwmmc.h>
 
 #define PAGE_SIZE 4096
 
diff --git a/include/dwmmc.h b/include/dwmmc.h
index 6c91143..8ea1092 100644
--- a/include/dwmmc.h
+++ b/include/dwmmc.h
@@ -123,6 +123,28 @@
 #define DWMCI_BMOD_IDMAC_FB    (1 << 1)
 #define DWMCI_BMOD_IDMAC_EN    (1 << 7)
 
+#define DWMCI_CLKSEL           0x09C
+#define DWMCI_SHIFT_0          0x0
+#define DWMCI_SHIFT_1          0x1
+#define DWMCI_SHIFT_2          0x2
+#define DWMCI_SHIFT_3          0x3
+#define DWMCI_SET_SAMPLE_CLK(x)        (x)
+#define DWMCI_SET_DRV_CLK(x)   ((x) << 16)
+#define DWMCI_SET_DIV_RATIO(x) ((x) << 24)
+
+#define EMMCP_MPSBEGIN0                0x1200
+#define EMMCP_SEND0            0x1204
+#define EMMCP_CTRL0            0x120C
+
+#define MPSCTRL_SECURE_READ_BIT                (0x1<<7)
+#define MPSCTRL_SECURE_WRITE_BIT       (0x1<<6)
+#define MPSCTRL_NON_SECURE_READ_BIT    (0x1<<5)
+#define MPSCTRL_NON_SECURE_WRITE_BIT   (0x1<<4)
+#define MPSCTRL_USE_FUSE_KEY           (0x1<<3)
+#define MPSCTRL_ECB_MODE               (0x1<<2)
+#define MPSCTRL_ENCRYPTION             (0x1<<1)
+#define MPSCTRL_VALID                  (0x1<<0)
+
 /* quirks */
 #define DWMCI_QUIRK_DISABLE_SMU                (1 << 0)
 
-- 
1.8.4.2

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