Hi,
Am 28.11.2013 17:04, schrieb Nikita Kiryanov:
Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3
based devices. This seems to be related to the following advisory which
apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as
OMAP4430 TRM:
Advisory:
I2C Module Does Not Allow 0-Byte Data Requests
Details:
When configured as the master, the I2C module does not allow 0-byte data
transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause
undefined behavior.
Workaround(s):
No workaround. Do not use 0-byte data requests.
The writes in question are unnecessary from a functional point of view.
Most of them are done after I/O has finished, and the only one that preceds
I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before
actual data transmission takes place.
Therefore, remove all writes that zero the cnt register.
Cc: Heiko Schocher <h...@denx.de>
Cc: Thomas Petazzoni <thomas.petazz...@free-electrons.com>
Cc: Tom Rini <tr...@ti.com>
Cc: Lubomir Popov <lpo...@mm-sol.com>
Cc: Enric Balletbo Serra <eballe...@gmail.com>
Signed-off-by: Nikita Kiryanov <nik...@compulab.co.il>
---
Changes in V2:
Removed all instances of writew(0, &i2c_base->cnt) instead of just the
one in i2c_write (following a test of V1 by Thomas Petazzoni).
I can also confirm this patch eliminates the frequent occurence of the
following message:
i2c_write: pads on bus 0 probably not configured (status=0x10)
Could not write grp_sel to reg 82 (2)
Tested on a custom AM37xx board with 2013.07. Before the patch I got
this message on about 5% of all reboots (I have test data of several
thousand reboots). However, the board never failed to boot, with or
without patch.
cheers,
Andi
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