On 01/09/2014 06:10 PM, Po Liu wrote:
> Using the TPL/SPL method to booting from 8k page NAND flash.
>       - Add 256kB size SRAM tlb for second step booting;
>       - Add spl.c for TPL image boot;
>       - Add spl_minimal.c for minimal SPL image;
>       - Add C29XPCIE_NAND configure;
>       - Modify C29XPCIE.h for nand config and enviroment;
> 
> Signed-off-by: Po Liu <[email protected]>
> ---
> changes for v2:
>       - seperate the public code and c29xpcie board code;
> changes for v3:
>       - booting log simple to "SPL" "TPL"
>       - remove the 8k TLB from 0xffffe000 to 0xffffffff
>       - change the ddr tlb mapping condition
> changes for v4:
>       - None.
> changes for v5:
>       - code style change.
> changes for v6:
>       - none

Applied to u-boot-mpc85xx master branch. Awaiting upstream.

York


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