On MX6DL at least, measured mdc speed was wrong (3.3 Mhz instead of 2.5
Mhz), because of wrong assumptions about the reference clock and the
way the divider is used.

I have fixed that for all MX6's by using the IPG clock as the reference
clock, and applying the - 1 correction when we have a ENET MAC instead
of a FEC MAC, just like what is done the fec linux driver.

Signed-off-by: Philippe De Muyter <[email protected]>
---
Change since v1:
- call get_ipg_clk() directly in mx6's imx_get_fecclk()

 arch/arm/cpu/armv7/mx6/clock.c |    2 +-
 drivers/net/fec_mxc.c          |   16 +++++++++++++---
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index 5617a41..83bb3b7 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -409,7 +409,7 @@ u32 imx_get_uartclk(void)
 
 u32 imx_get_fecclk(void)
 {
-       return decode_pll(PLL_ENET, MXC_HCLK);
+       return get_ipg_clk();
 }
 
 int enable_sata_clock(void)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 3b2b995..02fd1a6 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -124,13 +124,23 @@ static int fec_mdio_read(struct ethernet_regs *eth, 
uint8_t phyAddr,
 
 static void fec_mii_setspeed(struct ethernet_regs *eth)
 {
+       u32 sysclock;
+       u32 mii_speed;
+
        /*
         * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
         * and do not drop the Preamble.
+        * shift the result by 1, because MII_SPEED field is at bits 6..1.
         */
-       writel((((imx_get_fecclk() / 1000000) + 2) / 5) << 1,
-                       &eth->mii_speed);
-       debug("%s: mii_speed %08x\n", __func__, readl(&eth->mii_speed));
+       sysclock = imx_get_fecclk();
+#define MIIM_SPEED 2500000
+       mii_speed = DIV_ROUND_UP(sysclock, (MIIM_SPEED * 2));
+#ifdef FEC_QUIRK_ENET_MAC
+       mii_speed -= 1;
+#endif
+       writel(mii_speed << 1, &eth->mii_speed);
+       debug("%s: sysclock %u, mii_speed %08x\n", __func__, sysclock,
+                                               readl(&eth->mii_speed));
 }
 
 static int fec_mdio_write(struct ethernet_regs *eth, uint8_t phyAddr,
-- 
1.7.5.3

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