On 02/25/2014 08:08 PM, Priyanka Jain wrote: > Update following DDR related settings for T1040RDB, T1042RDB_PI > -Correct number of chip selects to two as t1040 supports > two Chip selects. > -Update board_specific_parameters udimm structure with settings > derived via calibration. > -Update ddr_raw_timing sructure corresponding to DIMM. > -Set ODT to off. Typically on FSL board, ODT is set to 75 ohm, > but on T104xRDB, on setting this , DDR instability is observed. > Board-level debugging is in progress. > > Verified the updated settings to be working fine with dual-ranked > Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s. > > Signed-off-by: Priyanka Jain <[email protected]> > Signed-off-by: York Sun <[email protected]> > --- > Changes for v2: > Udpated description related to ODT off, Removed > cpo, write_data_delay, force_2t parameters as they > are not longer used.
Applied to u-boot-mpc85xx/master. Thanks. York _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
