Now that the GPIO numbering series has been applied, we can use the correct
GPIO for the EC interrupt.
Signed-off-by: Simon Glass <s...@chromium.org>
---
Changes in v3:
- Add new patch to correct EC interrupt GPIO
Changes in v2: None
arch/arm/dts/exynos5250-snow.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/exynos5250-snow.dts b/arch/arm/dts/exynos5250-snow.dts
index 9b48a0c..c584172 100644
--- a/arch/arm/dts/exynos5250-snow.dts
+++ b/arch/arm/dts/exynos5250-snow.dts
@@ -44,7 +44,7 @@
reg = <0x1e>;
compatible = "google,cros-ec";
i2c-max-frequency = <100000>;
- ec-interrupt = <&gpio 782 1>;
+ ec-interrupt = <&gpio 182 1>;
};
power-regulator@48 {
@@ -60,7 +60,7 @@
reg = <0>;
compatible = "google,cros-ec";
spi-max-frequency = <5000000>;
- ec-interrupt = <&gpio 782 1>;
+ ec-interrupt = <&gpio 182 1>;
optimise-flash-write;
status = "disabled";
};
--
1.9.1.423.g4596e3a
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