pass correct PHY Address when running on SK
so that we have working ethernet with this board
too.
Signed-off-by: Felipe Balbi <ba...@ti.com>
---
board/ti/am43xx/board.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index b184c20..054a452 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -227,16 +227,16 @@ static const struct emif_regs ddr3_sk_emif_regs_400Mhz = {
.read_idle_ctrl = 0x00050000,
.zq_config = 0x50074be4,
.temp_alert_config = 0x0,
- .emif_ddr_phy_ctlr_1 = 0x0e084007,
+ .emif_ddr_phy_ctlr_1 = 0x0e084008,
.emif_ddr_ext_phy_ctrl_1 = 0x08020080,
- .emif_ddr_ext_phy_ctrl_2 = 0x00700070,
- .emif_ddr_ext_phy_ctrl_3 = 0x00700070,
- .emif_ddr_ext_phy_ctrl_4 = 0x00700070,
- .emif_ddr_ext_phy_ctrl_5 = 0x00700070,
+ .emif_ddr_ext_phy_ctrl_2 = 0x89,
+ .emif_ddr_ext_phy_ctrl_3 = 0x90,
+ .emif_ddr_ext_phy_ctrl_4 = 0x8e,
+ .emif_ddr_ext_phy_ctrl_5 = 0x8d,
.emif_rd_wr_lvl_rmp_win = 0x0,
- .emif_rd_wr_lvl_rmp_ctl = 0x0,
- .emif_rd_wr_lvl_ctl = 0x0,
- .emif_rd_wr_exec_thresh = 0x00000405
+ .emif_rd_wr_lvl_rmp_ctl = 0x00000000,
+ .emif_rd_wr_lvl_ctl = 0x00000000,
+ .emif_rd_wr_exec_thresh = 0x00000000,
};
const u32 ext_phy_ctrl_const_base_ddr3[] = {
@@ -594,6 +594,11 @@ int board_eth_init(bd_t *bis)
writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
cpsw_slaves[0].phy_addr = 16;
+ } else if (board_is_sk()) {
+ writel(RGMII_MODE_ENABLE, &cdev->miisel);
+ cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
+ cpsw_slaves[0].phy_addr = 4;
+ cpsw_slaves[1].phy_addr = 5;
} else {
writel(RGMII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
--
2.0.0.rc1
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