> > The tlb settings looks fine (debbug in setup_ddr_tlbs()): > > > > ram_tlb_address: 0x0, ram_tlb_address: 0x0, ram_tlb_index: > 0x8, tlb_size: > 0xa > > ram_tlb_address: 0x40000000, ram_tlb_address: 0x40000000, > ram_tlb_index: > 0x9, tlb_size: 0xa > > "tlb_size: 0xa" is _not_ fine. >
No, TLB_SIZE = 0xa is fine for 8548. That is e500v2 core. _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
