Hi Gerald!
Sorry for the late reply. Please find some comments below.
On 22.07.2014 18:12, Gerald Kerma wrote:
This patch add Marvell kirkwood MVSDIO/MMC driver and enable it for Sheevaplugs
and OpenRD boards.
Signed-off-by: Gerald Kerma <[email protected]>
---
Changes in v3:
- Add MVSDIO_TWEAK_NOSDHS quirk
- Minor clean
Changes in v2:
- Fix some typo and missing lines from patch import
<snip>
arch/arm/cpu/arm926ejs/kirkwood/cpu.c | 58 ++++
arch/arm/include/asm/arch-kirkwood/config.h | 2 +
arch/arm/include/asm/arch-kirkwood/cpu.h | 2 +
arch/arm/include/asm/arch-kirkwood/kirkwood.h | 24 ++
arch/arm/include/asm/arch-kirkwood/kw88f6282.h | 33 ++
board/Marvell/openrd/openrd.c | 11 +
board/Marvell/sheevaplug/sheevaplug.c | 11 +
drivers/mmc/Makefile | 1 +
drivers/mmc/mrvl_mmc.c | 461 +++++++++++++++++++++++++
include/configs/openrd.h | 8 +
include/configs/sheevaplug.h | 19 +-
include/mrvl_mmc.h | 290 ++++++++++++++++
12 files changed, 918 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/asm/arch-kirkwood/kw88f6282.h
create mode 100644 drivers/mmc/mrvl_mmc.c
create mode 100644 include/mrvl_mmc.h
diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index d4711c0..a6e18ff 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -334,6 +334,64 @@ int arch_cpu_init(void)
}
#endif /* CONFIG_ARCH_CPU_INIT */
+/*****************************************************************************
+ * General
+ ****************************************************************************/
+#if defined(CONFIG_ARCH_DEV_ID)
+
+void kirkwood_pcie_id(u32 *dev, u32 *rev)
+{
+ *dev = (readl(KW_REG_PCIE_DEVID) >> 16) & 0xffff;
+ *rev = readl(KW_REG_PCIE_REVID) & 0xff;
+}
+
+/*
+ * Identify device ID and revision.
+ */
+char *kirkwood_id(void)
+{
+ u32 dev, rev;
+
+ kirkwood_pcie_id(&dev, &rev);
+
+ if (dev == MV88F6281_DEV_ID) {
+ if (rev == MV88F6281_REV_Z0)
+ return "MV88F6281-Z0";
+ else if (rev == MV88F6281_REV_A0)
+ return "MV88F6281-A0";
+ else if (rev == MV88F6281_REV_A1)
+ return "MV88F6281-A1";
+ else
+ return "MV88F6281-Rev-Unsupported";
+ } else if (dev == MV88F6192_DEV_ID) {
+ if (rev == MV88F6192_REV_Z0)
+ return "MV88F6192-Z0";
+ else if (rev == MV88F6192_REV_A0)
+ return "MV88F6192-A0";
+ else if (rev == MV88F6192_REV_A1)
+ return "MV88F6192-A1";
+ else
+ return "MV88F6192-Rev-Unsupported";
+ } else if (dev == MV88F6180_DEV_ID) {
+ if (rev == MV88F6180_REV_A0)
+ return "MV88F6180-Rev-A0";
+ else if (rev == MV88F6180_REV_A1)
+ return "MV88F6180-Rev-A1";
+ else
+ return "MV88F6180-Rev-Unsupported";
+ } else if (dev == MV88F6282_DEV_ID) {
+ if (rev == MV88F6282_REV_A0)
+ return "MV88F6282-Rev-A0";
+ else if (rev == MV88F6282_REV_A1)
+ return "MV88F6282-Rev-A1";
+ else
+ return "MV88F6282-Rev-Unsupported";
+ } else {
+ return "Device-Unknown";
+ }
+}
+#endif /* CONFIG_ARCH_DEV_ID */
Is this kirkwood_id() function really needed for your MMC driver? This
looks a big unrelated to me. Even though it might be useful to print the
SoC revision / version upon bootup. But this should be moved to a
seperate patch instead.
+
/*
* SOC specific misc init
*/
diff --git a/arch/arm/include/asm/arch-kirkwood/config.h
b/arch/arm/include/asm/arch-kirkwood/config.h
index 7a688e4..a0563a3 100644
--- a/arch/arm/include/asm/arch-kirkwood/config.h
+++ b/arch/arm/include/asm/arch-kirkwood/config.h
@@ -19,6 +19,8 @@
#include <asm/arch/kw88f6281.h>
#elif defined (CONFIG_KW88F6192)
#include <asm/arch/kw88f6192.h>
+#elif defined(CONFIG_KW88F6182)
+#include <asm/arch/kw88f6182.h>
#else
#error "SOC Name not defined"
#endif /* CONFIG_KW88F6281 */
diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h
b/arch/arm/include/asm/arch-kirkwood/cpu.h
index 97daa40..e7b6448 100644
--- a/arch/arm/include/asm/arch-kirkwood/cpu.h
+++ b/arch/arm/include/asm/arch-kirkwood/cpu.h
@@ -151,5 +151,7 @@ int kw_config_mpp(unsigned int mpp0_7, unsigned int mpp8_15,
unsigned int mpp32_39, unsigned int mpp40_47,
unsigned int mpp48_55);
unsigned int kw_winctrl_calcsize(unsigned int sizeval);
+void kirkwood_pcie_id(u32 *dev, u32 *rev);
+char *kirkwood_id(void);
#endif /* __ASSEMBLY__ */
#endif /* _KWCPU_H */
diff --git a/arch/arm/include/asm/arch-kirkwood/kirkwood.h
b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
index bc207f5..489517f 100644
--- a/arch/arm/include/asm/arch-kirkwood/kirkwood.h
+++ b/arch/arm/include/asm/arch-kirkwood/kirkwood.h
@@ -39,6 +39,7 @@
#define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
#define KW_EGIGA1_BASE (KW_REGISTER(0x76000))
#define KW_SATA_BASE (KW_REGISTER(0x80000))
+#define KW_SDIO_BASE (KW_REGISTER(0x90000))
/* Kirkwood Sata controller has two ports */
#define KW_SATA_PORT0_OFFSET 0x2000
@@ -61,10 +62,33 @@
#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
+/*
+ * Supported devices and revisions.
+ */
+#define MV88F6281_DEV_ID 0x6281
+#define MV88F6281_REV_Z0 0
+#define MV88F6281_REV_A0 2
+#define MV88F6281_REV_A1 3
+
+#define MV88F6192_DEV_ID 0x6192
+#define MV88F6192_REV_Z0 0
+#define MV88F6192_REV_A0 2
+#define MV88F6192_REV_A1 3
+
+#define MV88F6180_DEV_ID 0x6180
+#define MV88F6180_REV_A0 2
+#define MV88F6180_REV_A1 3
+
+#define MV88F6282_DEV_ID 0x6282
+#define MV88F6282_REV_A0 0
+#define MV88F6282_REV_A1 1
+
#if defined (CONFIG_KW88F6281)
#include <asm/arch/kw88f6281.h>
#elif defined (CONFIG_KW88F6192)
#include <asm/arch/kw88f6192.h>
+#elif defined(CONFIG_KW88F6182)
+#include <asm/arch/kw88f6182.h>
#else
#error "SOC Name not defined"
#endif /* CONFIG_KW88F6281 */
diff --git a/arch/arm/include/asm/arch-kirkwood/kw88f6282.h
b/arch/arm/include/asm/arch-kirkwood/kw88f6282.h
new file mode 100644
index 0000000..5310da2
--- /dev/null
+++ b/arch/arm/include/asm/arch-kirkwood/kw88f6282.h
@@ -0,0 +1,33 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Prafulla Wadaskar <[email protected]>
+ *
+ * Header file for Feroceon CPU core 88FR131 Based KW88F6281 SOC.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
Please use the SPDX license identifiers instead. And fix this globally.
+
+#ifndef _ASM_ARCH_KW88F6281_H
+#define _ASM_ARCH_KW88F6281_H
+
+/* SOC specific definitions */
+#define KW88F6281_REGS_PHYS_BASE 0xf1000000
+#define KW_REGS_PHY_BASE KW88F6281_REGS_PHYS_BASE
+
+/* TCLK Core Clock definition */
+#ifndef CONFIG_SYS_TCLK
+#define CONFIG_SYS_TCLK 200000000 /* 200MHz */
+#endif
+
diff --git a/board/Marvell/openrd/openrd.c b/board/Marvell/openrd/openrd.c
index a005a2f..a0fb18a 100644
--- a/board/Marvell/openrd/openrd.c
+++ b/board/Marvell/openrd/openrd.c
@@ -17,6 +17,9 @@
#include <asm/arch/kirkwood.h>
#include <asm/arch/mpp.h>
#include "openrd.h"
+#ifdef CONFIG_MRVL_MMC
+#include <mrvl_mmc.h>
+#endif /* CONFIG_MRVL_MMC */
DECLARE_GLOBAL_DATA_PTR;
@@ -159,3 +162,11 @@ void reset_phy(void)
#endif
}
#endif /* CONFIG_RESET_PHY_R */
+
+#ifdef CONFIG_MRVL_MMC
+int board_mmc_init(bd_t *bis)
+{
+ mrvl_mmc_init(bis);
+ return 0;
+}
+#endif /* CONFIG_MRVL_MMC */
diff --git a/board/Marvell/sheevaplug/sheevaplug.c
b/board/Marvell/sheevaplug/sheevaplug.c
index 87e49f4..20096d5 100644
--- a/board/Marvell/sheevaplug/sheevaplug.c
+++ b/board/Marvell/sheevaplug/sheevaplug.c
@@ -12,6 +12,9 @@
#include <asm/arch/kirkwood.h>
#include <asm/arch/mpp.h>
#include "sheevaplug.h"
+#ifdef CONFIG_MRVL_MMC
+#include <mrvl_mmc.h>
+#endif /* CONFIG_MRVL_MMC */
DECLARE_GLOBAL_DATA_PTR;
@@ -131,3 +134,11 @@ void reset_phy(void)
printf("88E1116 Initialized on %s\n", name);
}
#endif /* CONFIG_RESET_PHY_R */
+
+#ifdef CONFIG_MRVL_MMC
+int board_mmc_init(bd_t *bis)
+{
+ mrvl_mmc_init(bis);
+ return 0;
+}
+#endif /* CONFIG_MRVL_MMC */
diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile
index 931922b..74b64d6 100644
--- a/drivers/mmc/Makefile
+++ b/drivers/mmc/Makefile
@@ -35,3 +35,4 @@ obj-$(CONFIG_SPL_MMC_BOOT) += fsl_esdhc_spl.o
else
obj-$(CONFIG_GENERIC_MMC) += mmc_write.o
endif
+obj-$(CONFIG_MRVL_MMC) += mrvl_mmc.o
diff --git a/drivers/mmc/mrvl_mmc.c b/drivers/mmc/mrvl_mmc.c
new file mode 100644
index 0000000..acc16c4
--- /dev/null
+++ b/drivers/mmc/mrvl_mmc.c
I assume that "mrvl" stands for Marvell, right? We should not add
another abbreviation for Marvell. How is this driver called in Linux?
Perhaps we should use "mvebu" as done for other Marvell perepherals that
are shared by Orion, Kirkwood, Armada etc.
@@ -0,0 +1,461 @@
+/*
+ * Driver for Marvell SDIO/MMC controller
+ *
+ * (C) Copyright 2012
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Gérald Kerma <[email protected]>
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <part.h>
+#include <mmc.h>
+#include <asm/io.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/kirkwood.h>
+
+#include <mrvl_mmc.h>
+
+#define DRIVER_NAME "MVSDIO"
+
+#define mvsd_write(offs, val) writel(val, CONFIG_SYS_MMC_BASE + (offs))
+#define mvsd_read(offs) readl(CONFIG_SYS_MMC_BASE + (offs))
+
+#define MRVL_MMC_MAKE_CMD(c, f) (((c & 0xff) << 8) | (f & 0xff))
+
+static int mrvl_mmc_setup_data(struct mmc_data *data)
+{
+ u32 ctrl_reg;
+
+#ifdef DEBUG
+ printf("%s, data %s : blocks=%d blksz=%d\n", DRIVER_NAME,
+ (data->flags & MMC_DATA_READ) ? "read" : "write",
+ data->blocks, data->blocksize);
+#endif
+
+ /* default to maximum timeout */
+ ctrl_reg = mvsd_read(SDIO_HOST_CTRL);
+ ctrl_reg |= SDIO_HOST_CTRL_TMOUT(SDIO_HOST_CTRL_TMOUT_MAX);
+ mvsd_write(SDIO_HOST_CTRL, ctrl_reg);
+
+ if (data->flags & MMC_DATA_READ) {
+ mvsd_write(SDIO_SYS_ADDR_LOW, (u32)data->dest & 0xffff);
+ mvsd_write(SDIO_SYS_ADDR_HI, (u32)data->dest >> 16);
+ } else {
+ mvsd_write(SDIO_SYS_ADDR_LOW, (u32)data->src & 0xffff);
+ mvsd_write(SDIO_SYS_ADDR_HI, (u32)data->src >> 16);
+ }
+
+ mvsd_write(SDIO_BLK_COUNT, data->blocks);
+ mvsd_write(SDIO_BLK_SIZE, data->blocksize);
+
+ return 0;
+}
+
+static int mrvl_mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
+ struct mmc_data *data)
+{
+ int timeout = 10;
+ ushort waittype = 0;
+ ushort resptype = 0;
+ ushort xfertype = 0;
+ ushort resp_indx = 0;
+
+#ifdef CONFIG_MMC_DEBUG
+ printf("cmdidx [0x%x] resp_type[0x%x] cmdarg[0x%x]\n",
+ cmd->cmdidx, cmd->resp_type, cmd->cmdarg);
+
+ printf("%s: cmd %d (hw state 0x%04x)\n", DRIVER_NAME,
+ cmd->cmdidx, mvsd_read(SDIO_HW_STATE));
+#endif
Hmmm. You seem to have some "#if DEBUG" and "#ifdef CONFIG_MMC_DEBUG"
lines in this driver. I suggest to move to the common debug() function
instead.
+
+ udelay(10*1000);
This should at least generate a checkpatch warning. Did you run this
through checkpatch? If not, please do.
+
+ /* Checking if card is busy */
+ while ((mvsd_read(SDIO_HW_STATE) & CARD_BUSY)) {
+ if (timeout == 0) {
+ printf("%s: card busy!\n", DRIVER_NAME);
+ return -1;
+ }
+ timeout--;
+ udelay(1000);
+ }
+
+ /* Set up for a data transfer if we have one */
+ if (data) {
+ int err = mrvl_mmc_setup_data(data);
+
+ if (err)
+ return err;
+ }
+
+ resptype = SDIO_CMD_INDEX(cmd->cmdidx);
+
+ /* Analyzing resptype/xfertype/waittype for the command */
+ if (cmd->resp_type & MMC_RSP_BUSY)
+ resptype |= SDIO_CMD_RSP_48BUSY;
+ else if (cmd->resp_type & MMC_RSP_136)
+ resptype |= SDIO_CMD_RSP_136;
+ else if (cmd->resp_type & MMC_RSP_PRESENT)
+ resptype |= SDIO_CMD_RSP_48;
+ else
+ resptype |= SDIO_CMD_RSP_NONE;
+
+ if (cmd->resp_type & MMC_RSP_CRC)
+ resptype |= SDIO_CMD_CHECK_CMDCRC;
+
+ if (cmd->resp_type & MMC_RSP_OPCODE)
+ resptype |= SDIO_CMD_INDX_CHECK;
+
+ if (cmd->resp_type & MMC_RSP_PRESENT) {
+ resptype |= SDIO_UNEXPECTED_RESP;
+ waittype |= SDIO_NOR_UNEXP_RSP;
+ }
+
+ if (data) {
+ resptype |= SDIO_CMD_DATA_PRESENT | SDIO_CMD_CHECK_DATACRC16;
+ xfertype |= SDIO_XFER_MODE_HW_WR_DATA_EN;
+ if (data->flags & MMC_DATA_READ) {
+ xfertype |= SDIO_XFER_MODE_TO_HOST;
+ waittype = SDIO_NOR_DMA_INI;
+ } else {
+ waittype |= SDIO_NOR_XFER_DONE;
+ }
+ } else {
+ waittype |= SDIO_NOR_CMD_DONE;
+ }
+
+ /* Setting cmd arguments */
+ mvsd_write(SDIO_ARG_LOW, cmd->cmdarg & 0xffff);
+ mvsd_write(SDIO_ARG_HI, cmd->cmdarg >> 16);
+
+ /* Setting Xfer mode */
+ mvsd_write(SDIO_XFER_MODE, xfertype);
+
+ mvsd_write(SDIO_NOR_INTR_STATUS, ~SDIO_NOR_CARD_INT);
+ mvsd_write(SDIO_ERR_INTR_STATUS, SDIO_POLL_MASK);
+
+ /* Sending command */
+ mvsd_write(SDIO_CMD, resptype);
+/*
+ mvsd_write(SDIO_CMD, MRVL_MMC_MAKE_CMD(cmd->cmdidx, resptype));
+*/
No dead code please.
+
+ mvsd_write(SDIO_NOR_INTR_EN, SDIO_POLL_MASK);
+ mvsd_write(SDIO_ERR_INTR_EN, SDIO_POLL_MASK);
+
+ /* Waiting for completion */
+ timeout = 1000000;
+
+ while (!((mvsd_read(SDIO_NOR_INTR_STATUS)) & waittype)) {
+ if (mvsd_read(SDIO_NOR_INTR_STATUS) & SDIO_NOR_ERROR) {
+#ifdef DEBUG
+ printf("%s: error! cmdidx : %d, err reg: %04x\n",
+ DRIVER_NAME, cmd->cmdidx,
+ mvsd_read(SDIO_ERR_INTR_STATUS));
+#endif
+ if (mvsd_read(SDIO_ERR_INTR_STATUS) &
+ (SDIO_ERR_CMD_TIMEOUT | SDIO_ERR_DATA_TIMEOUT))
+ return TIMEOUT;
+ return COMM_ERR;
+ }
+
+ timeout--;
+ udelay(1);
+ if (timeout <= 0) {
+ printf("%s: command timed out\n", DRIVER_NAME);
+ return TIMEOUT;
+ }
+ }
+
+ /* Handling response */
+ if (cmd->resp_type & MMC_RSP_136) {
+ uint response[8];
+
+ for (resp_indx = 0; resp_indx < 8; resp_indx++)
+ response[resp_indx] = mvsd_read(SDIO_RSP(resp_indx));
+
+ cmd->response[0] = ((response[0] & 0x03ff) << 22) |
+ ((response[1] & 0xffff) << 6) |
+ ((response[2] & 0xfc00) >> 10);
+ cmd->response[1] = ((response[2] & 0x03ff) << 22) |
+ ((response[3] & 0xffff) << 6) |
+ ((response[4] & 0xfc00) >> 10);
+ cmd->response[2] = ((response[4] & 0x03ff) << 22) |
+ ((response[5] & 0xffff) << 6) |
+ ((response[6] & 0xfc00) >> 10);
+ cmd->response[3] = ((response[6] & 0x03ff) << 22) |
+ ((response[7] & 0x3fff) << 8);
+ } else if (cmd->resp_type & MMC_RSP_PRESENT) {
+ uint response[3];
+
+ for (resp_indx = 0; resp_indx < 3; resp_indx++)
+ response[resp_indx] = mvsd_read(SDIO_RSP(resp_indx));
+
+ cmd->response[0] = ((response[2] & 0x003f) << (8 - 8)) |
+ ((response[1] & 0xffff) << (14 - 8)) |
+ ((response[0] & 0x03ff) << (30 - 8));
+ cmd->response[1] = ((response[0] & 0xfc00) >> 10);
+ cmd->response[2] = 0;
+ cmd->response[3] = 0;
+ }
+
+#ifdef CONFIG_MMC_DEBUG
+ printf("%s: resp[0x%x] ", DRIVER_NAME, cmd->resp_type);
+ printf("[0x%x] ", cmd->response[0]);
+ printf("[0x%x] ", cmd->response[1]);
+ printf("[0x%x] ", cmd->response[2]);
+ printf("[0x%x] ", cmd->response[3]);
+ printf("\n");
+#endif
+
+ return 0;
+}
+
+static void mvsd_power_up(void)
+{
+#ifdef DEBUG
+ printf("%s: power up\n", DRIVER_NAME);
+#endif
+ /* disable interrupts */
+ mvsd_write(SDIO_NOR_INTR_EN, 0);
+ mvsd_write(SDIO_ERR_INTR_EN, 0);
+
+ /* SW reset */
+ mvsd_write(SDIO_SW_RESET, SDIO_SW_RESET_NOW);
+
+ mvsd_write(SDIO_XFER_MODE, 0);
+
+ /* enable status */
+ mvsd_write(SDIO_NOR_STATUS_EN, SDIO_POLL_MASK);
+ mvsd_write(SDIO_ERR_STATUS_EN, SDIO_POLL_MASK);
+
+ /* enable interrupts status */
+ mvsd_write(SDIO_NOR_INTR_STATUS, SDIO_POLL_MASK);
+ mvsd_write(SDIO_ERR_INTR_STATUS, SDIO_POLL_MASK);
+}
+
+static void mvsd_power_down(void)
+{
+#ifdef DEBUG
+ printf("%s: power down\n", DRIVER_NAME);
+#endif
+ /* disable interrupts */
+ mvsd_write(SDIO_NOR_INTR_EN, 0);
+ mvsd_write(SDIO_ERR_INTR_EN, 0);
+
+ /* SW reset */
+ mvsd_write(SDIO_SW_RESET, SDIO_SW_RESET_NOW);
+
+ mvsd_write(SDIO_XFER_MODE, SDIO_XFER_MODE_STOP_CLK);
+
+ /* disable status */
+ mvsd_write(SDIO_NOR_STATUS_EN, 0);
+ mvsd_write(SDIO_ERR_STATUS_EN, 0);
+
+ /* enable interrupts status */
+ mvsd_write(SDIO_NOR_INTR_STATUS, SDIO_POLL_MASK);
+ mvsd_write(SDIO_ERR_INTR_STATUS, SDIO_POLL_MASK);
+}
+
+static u32 mrvl_mmc_get_base_clock(void)
+{
+ u32 devid;
+ u32 revid;
+
+ if (0) {
+ kirkwood_pcie_id(&devid, &revid);
+
+#ifdef DEBUG
+ printf("%s: board devid[0x%x] devid[0x%x]\n",
+ DRIVER_NAME, devid, revid);
+#endif
+
+ if (revid == 0 && devid != MV88F6282_DEV_ID) {
+ /* catch all Kirkwood Z0's */
+#ifdef DEBUG
+ printf("%s: Kirkwood Z0's base clock = %d\n",
+ DRIVER_NAME, MRVL_MMC_BASE_FAST_CLK_100);
+#endif
+ return MRVL_MMC_BASE_FAST_CLK_100;
+ } else {
+#ifdef DEBUG
+ printf("%s: base clock = %d\n",
+ DRIVER_NAME, MRVL_MMC_BASE_FAST_CLK_200);
+#endif
This really look ugly. Please switch to debug() instead as mentioned above.
Thanks,
Stefan
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