Since Tegra now uses driver model for serial, adjust the definition of V_NS16550_CLK so that it is clear that this is only used for SPL.
Signed-off-by: Simon Glass <s...@chromium.org> --- Changes in v3: - Add new patch to use V_NS16550_CLK only in SPL builds Changes in v2: None include/configs/tegra124-common.h | 2 ++ include/configs/tegra20-common.h | 2 ++ include/configs/tegra30-common.h | 2 ++ 3 files changed, 6 insertions(+) diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 61e5026..8c5842e 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -16,7 +16,9 @@ /* * NS16550 Configuration */ +#ifdef CONFIG_SPL_BUILD #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ +#endif /* Environment information, boards can override if required */ #define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */ diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index 21bf977..4f8706a 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -22,7 +22,9 @@ /* * NS16550 Configuration */ +#ifdef CONFIG_SPL_BUILD #define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */ +#endif /* Environment information, boards can override if required */ #define CONFIG_LOADADDR 0x00408000 /* def. location for kernel */ diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 443c842..6d2558c 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -21,7 +21,9 @@ /* * NS16550 Configuration */ +#ifdef CONFIG_SPL_BUILD #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ +#endif /* Environment information, boards can override if required */ #define CONFIG_LOADADDR 0x80408000 /* def. location for kernel */ -- 2.0.0.526.g5318336 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
