If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.

Signed-off-by: Bo Shen <[email protected]>
---

 drivers/usb/host/ohci-at91.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index c24505e..820e2e5 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -38,8 +38,8 @@ int usb_cpu_init(void)
 #endif
 
        /* Enable USB host clock. */
-#ifdef CONFIG_SAMA5D3
-       writel(1 << (ATMEL_ID_UHP - 32), &pmc->pcer1);
+#ifdef CPU_HAS_PCR
+       at91_periph_clk_enable(ATMEL_ID_UHP);
 #else
        writel(1 << ATMEL_ID_UHP, &pmc->pcer);
 #endif
@@ -58,8 +58,8 @@ int usb_cpu_stop(void)
        at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC;
 
        /* Disable USB host clock. */
-#ifdef CONFIG_SAMA5D3
-       writel(1 << (ATMEL_ID_UHP - 32), &pmc->pcdr1);
+#ifdef CPU_HAS_PCR
+       at91_periph_clk_disable(ATMEL_ID_UHP);
 #else
        writel(1 << ATMEL_ID_UHP, &pmc->pcdr);
 #endif
-- 
1.8.5.2

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