[U-Boot] [PATCH 10/11] 85xx, 86xx: Move dma_init() call to common code

[Peter Tyser]

Signed-off-by: Peter Tyser <pty...@xes-inc.com>
---
 board/mpc8540eval/mpc8540eval.c |    2 +-
 board/sbc8560/sbc8560.c         |    2 +-
 cpu/mpc85xx/cpu_init.c          |    4 +++-
 cpu/mpc85xx/ddr-gen1.c          |    2 --
 cpu/mpc86xx/cpu_init.c          |    3 +++
 5 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c
index 3d395c6..27d7a3d 100644
--- a/board/mpc8540eval/mpc8540eval.c
+++ b/board/mpc8540eval/mpc8540eval.c
@@ -140,7 +140,7 @@ phys_size_t initdram (int board_type)
                uint *p = 0;
                uint i = 0;
                volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
-               dma_init();
+
                for (*p = 0; p < (uint *)(8 * 1024); p++) {
                        if (((unsigned int)p & 0x1f) == 0) { dcbz(p); }
                        *p = (unsigned int)0xdeadbeef;
diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c
index 0b8e3e5..64d4154 100644
--- a/board/sbc8560/sbc8560.c
+++ b/board/sbc8560/sbc8560.c
@@ -341,7 +341,7 @@ phys_size_t initdram (int board_type)
                uint *p = 0;
                uint i = 0;
                volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
-               dma_init();
+
                for (*p = 0; p < (uint *)(8 * 1024); p++) {
                        if (((unsigned int)p & 0x1f) == 0) { dcbz(p); }
                        *p = (unsigned int)0xdeadbeef;
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index c98dd8d..41de694 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -261,7 +261,9 @@ void cpu_init_f (void)
 #if defined(CONFIG_MPC8536)
        fsl_serdes_init();
 #endif
-
+#if defined(CONFIG_FSL_DMA)
+       dma_init();
+#endif
 }
 
 
diff --git a/cpu/mpc85xx/ddr-gen1.c b/cpu/mpc85xx/ddr-gen1.c
index 6e628bd..5529021 100644
--- a/cpu/mpc85xx/ddr-gen1.c
+++ b/cpu/mpc85xx/ddr-gen1.c
@@ -77,8 +77,6 @@ ddr_enable_ecc(unsigned int dram_size)
        uint i = 0;
        volatile ccsr_ddr_t *ddr= (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
 
-       dma_init();
-
        for (*p = 0; p < (uint *)(8 * 1024); p++) {
                if (((unsigned int)p & 0x1f) == 0) {
                        ppcDcbz((unsigned long) p);
diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c
index 49528aa..341e815 100644
--- a/cpu/mpc86xx/cpu_init.c
+++ b/cpu/mpc86xx/cpu_init.c
@@ -113,6 +113,9 @@ void cpu_init_f(void)
        memctl->or7 = CONFIG_SYS_OR7_PRELIM;
        memctl->br7 = CONFIG_SYS_BR7_PRELIM;
 #endif
+#if defined(CONFIG_FSL_DMA)
+       dma_init();
+#endif
 
        /* enable the timebase bit in HID0 */
        set_hid0(get_hid0() | 0x4000000);
-- 
1.6.2.1

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