On Wed, Sep 10, 2014 at 03:54:59PM +0300, Khoronzhuk, Ivan wrote: > From: Murali Karicheri <[email protected]> > > This patch implements a workaround to fix DDR3 memory issue. > The code for workaround detects PGSR0 errors and then preps for > and executes a software-controlled hard reset.In board_early_init, > where logic has been added to identify whether or not the previous > reset was a PORz. PLL initialization is skipped in the case of a > software-controlled hard reset. > > Signed-off-by: Murali Karicheri <[email protected]> > Signed-off-by: Keegan Garcia <[email protected]> > Signed-off-by: Ivan Khoronzhuk <[email protected]>
Applied to u-boot-ti/master, thanks! -- Tom
signature.asc
Description: Digital signature
_______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
