This is needed for the SoCFPGA booting from SPI NOR flash e.g. (N25Q256A). With these changes, the SoCrates can boot and re-boot (reset) from SPI NOR flash without any problems.
Signed-off-by: Stefan Roese <[email protected]> Cc: Chin Liang See <[email protected]> Cc: Dinh Nguyen <[email protected]> Cc: Vince Bridgers <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Pavel Machek <[email protected]> Cc: Michael Trimarchi <[email protected]> Cc: Jagannadha Sutradharudu Teki <[email protected]> --- drivers/mtd/spi/sf_probe.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index 4d148d1..85b2677 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -355,6 +355,37 @@ static struct spi_flash *spi_flash_probe_slave(struct spi_slave *spi) } } +#ifdef CONFIG_SPI_N25Q256A_RESET +#define CMD_RESET_ENABLE 0x66 +#define CMD_RESET_MEMORY 0x99 + /* + * This is needed for the SoCFPGA booting from SPI NOR flash + * e.g. (N25Q256A). Additionally its necessary to change + * this line in the Linux SPI NOR flash driver: + * + * { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, + * SECT_4K | SHUTDOWN_3BYTE) }, + * + * Add SHUTDOWN_3BYTE here. + * + * With these changes, the SoCrates can boot and re-boot + * (reset) from SPI NOR flash without any problems. + */ + ret = spi_flash_cmd(spi, CMD_RESET_ENABLE, NULL, 0); + if (ret) { + printf("SF: Failed issue reset command\n"); + goto err_read_id; + } + + ret = spi_flash_cmd(spi, CMD_RESET_MEMORY, NULL, 0); + if (ret) { + printf("SF: Failed issue reset command\n"); + goto err_read_id; + } + + printf("SF: Device software reset\n"); +#endif + #ifdef CONFIG_OF_CONTROL if (spi_flash_decode_fdt(gd->fdt_blob, flash)) { debug("SF: FDT decode error\n"); -- 2.1.1 _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
