On 14/11/2014 14:27, Fabio Estevam wrote: > From: Fabio Estevam <[email protected]> > > Move MX5 specific set_chipselect_size function into generic i.MX part, > such that MX6 based boards are able to use this function as well. > > While doing this the iomuxc gpr member needed to be consolidated between > MX5 and MX6. > > Signed-off-by: Fabio Estevam <[email protected]> > --- > arch/arm/cpu/armv7/mx5/soc.c | 31 > ------------------------------- > arch/arm/imx-common/cpu.c | 31 > +++++++++++++++++++++++++++++++ > arch/arm/include/asm/arch-imx/cpu.h | 5 +++++ > arch/arm/include/asm/arch-mx5/imx-regs.h | 12 ++---------- > arch/arm/include/asm/arch-mx6/sys_proto.h | 1 + > 5 files changed, 39 insertions(+), 41 deletions(-) > > diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c > index 2d53669..3753c14 100644 > --- a/arch/arm/cpu/armv7/mx5/soc.c > +++ b/arch/arm/cpu/armv7/mx5/soc.c > @@ -85,37 +85,6 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) > } > #endif > > -void set_chipselect_size(int const cs_size) > -{ > - unsigned int reg; > - struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; > - reg = readl(&iomuxc_regs->gpr1); > - > - switch (cs_size) { > - case CS0_128: > - reg &= ~0x7; /* CS0=128MB, CS1=0, CS2=0, CS3=0 */ > - reg |= 0x5; > - break; > - case CS0_64M_CS1_64M: > - reg &= ~0x3F; /* CS0=64MB, CS1=64MB, CS2=0, CS3=0 */ > - reg |= 0x1B; > - break; > - case CS0_64M_CS1_32M_CS2_32M: > - reg &= ~0x1FF; /* CS0=64MB, CS1=32MB, CS2=32MB, CS3=0 */ > - reg |= 0x4B; > - break; > - case CS0_32M_CS1_32M_CS2_32M_CS3_32M: > - reg &= ~0xFFF; /* CS0=32MB, CS1=32MB, CS2=32MB, CS3=32MB */ > - reg |= 0x249; > - break; > - default: > - printf("Unknown chip select size: %d\n", cs_size); > - break; > - } > - > - writel(reg, &iomuxc_regs->gpr1); > -} > - > #ifdef CONFIG_MX53 > void boot_mode_apply(unsigned cfg_val) > { > diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c > index 09fc227..24740b8 100644 > --- a/arch/arm/imx-common/cpu.c > +++ b/arch/arm/imx-common/cpu.c > @@ -187,3 +187,34 @@ void arch_preboot_os(void) > ipuv3_fb_shutdown(); > } > #endif > + > +void set_chipselect_size(int const cs_size) > +{ > + unsigned int reg; > + struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; > + reg = readl(&iomuxc_regs->gpr[1]); > + > + switch (cs_size) { > + case CS0_128: > + reg &= ~0x7; /* CS0=128MB, CS1=0, CS2=0, CS3=0 */ > + reg |= 0x5; > + break; > + case CS0_64M_CS1_64M: > + reg &= ~0x3F; /* CS0=64MB, CS1=64MB, CS2=0, CS3=0 */ > + reg |= 0x1B; > + break; > + case CS0_64M_CS1_32M_CS2_32M: > + reg &= ~0x1FF; /* CS0=64MB, CS1=32MB, CS2=32MB, CS3=0 */ > + reg |= 0x4B; > + break; > + case CS0_32M_CS1_32M_CS2_32M_CS3_32M: > + reg &= ~0xFFF; /* CS0=32MB, CS1=32MB, CS2=32MB, CS3=32MB */ > + reg |= 0x249; > + break; > + default: > + printf("Unknown chip select size: %d\n", cs_size); > + break; > + } > + > + writel(reg, &iomuxc_regs->gpr[1]); > +} > diff --git a/arch/arm/include/asm/arch-imx/cpu.h > b/arch/arm/include/asm/arch-imx/cpu.h > index a3cc96f..254136e 100644 > --- a/arch/arm/include/asm/arch-imx/cpu.h > +++ b/arch/arm/include/asm/arch-imx/cpu.h > @@ -12,3 +12,8 @@ > #define MXC_CPU_MX6Q 0x63 > #define MXC_CPU_MX6D 0x64 > #define MXC_CPU_MX6SOLO 0x65 /* dummy ID */ > + > +#define CS0_128 0 > +#define CS0_64M_CS1_64M 1 > +#define CS0_64M_CS1_32M_CS2_32M 2 > +#define CS0_32M_CS1_32M_CS2_32M_CS3_32M 3 > diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h > b/arch/arm/include/asm/arch-mx5/imx-regs.h > index 054c680..f059d0f 100644 > --- a/arch/arm/include/asm/arch-mx5/imx-regs.h > +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h > @@ -202,11 +202,6 @@ > */ > #define WBED 1 > > -#define CS0_128 0 > -#define CS0_64M_CS1_64M 1 > -#define CS0_64M_CS1_32M_CS2_32M 2 > -#define CS0_32M_CS1_32M_CS2_32M_CS3_32M 3 > - > /* > * CSPI register definitions > */ > @@ -414,8 +409,7 @@ struct weim { > > #if defined(CONFIG_MX51) > struct iomuxc { > - u32 gpr0; > - u32 gpr1; > + u32 gpr[2]; > u32 omux0; > u32 omux1; > u32 omux2; > @@ -424,9 +418,7 @@ struct iomuxc { > }; > #elif defined(CONFIG_MX53) > struct iomuxc { > - u32 gpr0; > - u32 gpr1; > - u32 gpr2; > + u32 gpr[3]; > u32 omux0; > u32 omux1; > u32 omux2; > diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h > b/arch/arm/include/asm/arch-mx6/sys_proto.h > index c35a905..28ba844 100644 > --- a/arch/arm/include/asm/arch-mx6/sys_proto.h > +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h > @@ -26,6 +26,7 @@ u32 get_cpu_rev(void); > > const char *get_imx_type(u32 imxtype); > unsigned imx_ddr_size(void); > +void set_chipselect_size(int const); > > /* > * Initializes on-chip ethernet controllers. >
Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: [email protected] ===================================================================== _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
