Hi Fabio, On Tue, Nov 25, 2014 at 4:11 PM, Fabio Estevam <fabio.este...@freescale.com> wrote: > Leave the OCOTP turned on, so that we subsequent access do not fail. > > After enabling the thermal driver on a mx6sxsabresd board: > > U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01) > > CPU: Freescale i.MX6SX rev1.0 at 792 MHz > CPU: Temperature 48 C > Reset cause: POR > Board: MX6SX SABRE SDB > I2C: ready > DRAM: 1 GiB > PMIC: PFUZE100 ID=0x10 > MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 > 00:01.0 - 16c3:abcd - Bridge device > 01:00.0 - 8086:08b1 - Network controller > In: serial > Out: serial > Err: serial > Net: > (hang) > > As the thermal driver accesses the ocotp registers, its clock will be disabled > afterwards. > > Then when the MAC address is read (also from ocotp registers) it will cause a > hang. > > Do not disable the ocotp clock to prevent this problem. > > Signed-off-by: Fabio Estevam <fabio.este...@freescale.com> > --- > drivers/misc/mxc_ocotp.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/misc/mxc_ocotp.c b/drivers/misc/mxc_ocotp.c > index 3de1245..67f9429 100644 > --- a/drivers/misc/mxc_ocotp.c > +++ b/drivers/misc/mxc_ocotp.c > @@ -81,8 +81,6 @@ static int finish_access(struct ocotp_regs *regs, const > char *caller) > err = !!(readl(®s->ctrl) & BM_CTRL_ERROR); > clear_error(regs); > > - enable_ocotp_clk(0); > - > if (err) { > printf("mxc_ocotp %s(): Access protect error\n", caller); > return -EIO;
That, or: - Make imx_get_mac_from_fuse() call enable_ocotp_clk(1) before reading the fuses, then call enable_ocotp_clk(0). - Make enable_ocotp_clk() return the clock initial state and store it in prepare_access(), then restore it in finish_access(). Same in imx_get_mac_from_fuse(). Which of these 3 choices do you think would be the best? Regards, Benoît _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot