Renesas R-Mobile/R-Car ARM SoC of MMC has the same IP that are supported by
sh_mmcif. This adds support R-Mobile/R-Car ARM SoC with the setting of the
clock support.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu...@renesas.com>
---
drivers/mmc/sh_mmcif.c | 2 +-
drivers/mmc/sh_mmcif.h | 7 ++++++-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c
index 3a2022c..76ba93b 100644
--- a/drivers/mmc/sh_mmcif.c
+++ b/drivers/mmc/sh_mmcif.c
@@ -596,7 +596,7 @@ int mmcif_mmc_init(void)
host->clk = CONFIG_SH_MMCIF_CLK;
sh_mmcif_cfg.f_min = MMC_CLK_DIV_MIN(host->clk);
- sh_mmcif_cfg.f_max = MMC_CLK_DIV_MAX;
+ sh_mmcif_cfg.f_max = MMC_CLK_DIV_MAX(host->clk);
mmc = mmc_create(&sh_mmcif_cfg, host);
if (mmc == NULL) {
diff --git a/drivers/mmc/sh_mmcif.h b/drivers/mmc/sh_mmcif.h
index 70034e2..4b6752f 100644
--- a/drivers/mmc/sh_mmcif.h
+++ b/drivers/mmc/sh_mmcif.h
@@ -199,8 +199,13 @@ struct sh_mmcif_regs {
#define SOFT_RST_OFF (0 << 31)
#define CLKDEV_EMMC_DATA 52000000 /* 52MHz */
+#ifdef CONFIG_RMOBILE
+#define MMC_CLK_DIV_MIN(clk) (clk / (1 << 9))
+#define MMC_CLK_DIV_MAX(clk) (clk / (1 << 1))
+#else
#define MMC_CLK_DIV_MIN(clk) (clk / (1 << 8))
-#define MMC_CLK_DIV_MAX CLKDEV_EMMC_DATA
+#define MMC_CLK_DIV_MAX(clk) CLKDEV_EMMC_DATA
+#endif
#define MMC_BUS_WIDTH_1 0
#define MMC_BUS_WIDTH_4 2
--
2.1.3
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