Hi Bin, On 9 December 2014 at 07:49, Bin Meng <bmeng...@gmail.com> wrote: > On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8) > are provided by a superio chip connected to the LPC bus. We must > program the superio chip so that serial ports are available for us. > > Signed-off-by: Bin Meng <bmeng...@gmail.com> > > --- > > Changes in v2: > - Add a comment to describe PNP_DEV > - Change pnp device inline routine parameters to use proper size > > arch/x86/include/asm/pnp_def.h | 90 > ++++++++++++++++++++++++++++++++++++++++++ > drivers/misc/Makefile | 1 + > drivers/misc/smsc_lpc47m.c | 33 ++++++++++++++++ > include/smsc_lpc47m.h | 19 +++++++++ > 4 files changed, 143 insertions(+) > create mode 100644 arch/x86/include/asm/pnp_def.h > create mode 100644 drivers/misc/smsc_lpc47m.c > create mode 100644 include/smsc_lpc47m.h
It feels like this should use driver model, and be configured from the device tree. I'm actually thinking we should avoid the either/or approach with boards. We should support an image which can run on two or three Atom platforms, etc. At this early stage of the work I don't think it is much effort, and the pay-off is that we might end up with the ability to build a single firmware image for multiple boards. What do you think? Anyway, I think this is OK so far as it goes, and it is easier to make changes with two boards in the tree: Acked-by: Simon Glass <s...@chromium.org> Regards, Simon _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
