MMC of exynos5420 can select SPLL as source clock, so add to support SPLL in exynos5420_get_mmc_clk(). It was tested on Odroid-XU3 board.
Signed-off-by: Joonyoung Shim <[email protected]> --- arch/arm/cpu/armv7/exynos/clock.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 8fab135..b31c13b 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -848,6 +848,8 @@ static unsigned long exynos5420_get_mmc_clk(int dev_index) if (sel == 0x3) sclk = get_pll_clk(MPLL); + else if (sel == 0x4) + sclk = get_pll_clk(SPLL); else if (sel == 0x6) sclk = get_pll_clk(EPLL); else -- 1.9.1 _______________________________________________ U-Boot mailing list [email protected] http://lists.denx.de/mailman/listinfo/u-boot
