All of the code in arch/arm/cpu/armv7/sunxi/board.c was under a check
for CONFIG_SPL_BUILD so instead only build for SPL. This lets us drop a
hunk of code that was never enabled.
Cc: Hans de Goede <hdego...@redhat.com>
Cc: Ian Campbell <i...@hellion.org.uk>
Signed-off-by: Tom Rini <tr...@ti.com>
---
arch/arm/cpu/armv7/sunxi/Makefile | 2 +-
arch/arm/cpu/armv7/sunxi/board.c | 15 ---------------
2 files changed, 1 insertion(+), 16 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/Makefile
b/arch/arm/cpu/armv7/sunxi/Makefile
index 1720f7d..1fbfb6c 100644
--- a/arch/arm/cpu/armv7/sunxi/Makefile
+++ b/arch/arm/cpu/armv7/sunxi/Makefile
@@ -8,7 +8,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += timer.o
-obj-y += board.o
obj-y += clock.o
obj-y += cpu_info.o
obj-y += pinmux.o
@@ -30,6 +29,7 @@ endif
endif
ifdef CONFIG_SPL_BUILD
+obj-y += board.o
obj-$(CONFIG_MACH_SUN4I) += dram_sun4i.o
obj-$(CONFIG_MACH_SUN5I) += dram_sun4i.o
obj-$(CONFIG_MACH_SUN6I) += dram_sun6i.o
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index f4a580a..5998548 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -15,9 +15,7 @@
#include <netdev.h>
#include <miiphy.h>
#include <serial.h>
-#ifdef CONFIG_SPL_BUILD
#include <spl.h>
-#endif
#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
@@ -27,10 +25,6 @@
#include <linux/compiler.h>
-#ifdef CONFIG_SPL_BUILD
-/* Pointer to the global data structure for SPL */
-DECLARE_GLOBAL_DATA_PTR;
-
/* The sunxi internal brom will try to loader external bootloader
* from mmc0, nand flash, mmc2.
* Unfortunately we can't check how SPL was loaded so assume
@@ -92,14 +86,6 @@ void board_init_f(ulong dummy)
* access gets messed up (seems cache related) */
setbits_le32(SUNXI_SRAMC_BASE + 0x44, 0x1800);
#endif
-#if !defined CONFIG_SPL_BUILD && (defined CONFIG_MACH_SUN7I || \
- defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I)
- /* Enable SMP mode for CPU0, by setting bit 6 of Auxiliary Ctl reg */
- asm volatile(
- "mrc p15, 0, r0, c1, c0, 1\n"
- "orr r0, r0, #1 << 6\n"
- "mcr p15, 0, r0, c1, c0, 1\n");
-#endif
clock_init();
timer_init();
@@ -186,4 +172,3 @@ int cpu_eth_init(bd_t *bis)
return 0;
}
-#endif
--
1.7.9.5
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