This patch adds support for the Marvell Armada 38x SoC family.

Supported peripherals are:
- UART
- Ethernet (mvneta)
- I2C
- SPI (including SPI NOR flash)

Tested on Marvell DB-88F6820-GP evaluation board.

Signed-off-by: Stefan Roese <[email protected]>
---

 arch/arm/mach-mvebu/cpu.c              | 79 +++++++++++++++++++++++++++-------
 arch/arm/mach-mvebu/include/mach/soc.h |  7 +++
 2 files changed, 70 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c
index 1cf70a9..95df408 100644
--- a/arch/arm/mach-mvebu/cpu.c
+++ b/arch/arm/mach-mvebu/cpu.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2014 Stefan Roese <[email protected]>
+ * Copyright (C) 2014-2015 Stefan Roese <[email protected]>
  *
  * SPDX-License-Identifier:    GPL-2.0+
  */
@@ -40,6 +40,26 @@ void reset_cpu(unsigned long ignored)
                ;
 }
 
+enum {
+       MVEBU_SOC_AXP,
+       MVEBU_SOC_A38X,
+       MVEBU_SOC_UNKNOWN,
+};
+
+static int mvebu_soc_family(void)
+{
+       u16 devid = (readl(MVEBU_REG_PCIE_DEVID) >> 16) & 0xffff;
+
+       if (devid == SOC_MV78460_ID)
+               return MVEBU_SOC_AXP;
+
+       if (devid == SOC_88F6810_ID || devid == SOC_88F6820_ID ||
+           devid == SOC_88F6828_ID)
+               return MVEBU_SOC_A38X;
+
+       return MVEBU_SOC_UNKNOWN;
+}
+
 #if defined(CONFIG_DISPLAY_CPUINFO)
 int print_cpuinfo(void)
 {
@@ -52,23 +72,48 @@ int print_cpuinfo(void)
        case SOC_MV78460_ID:
                puts("MV78460-");
                break;
-       default:
-               puts("Unknown-");
+       case SOC_88F6810_ID:
+               puts("MV88F6810-");
                break;
-       }
-
-       switch (revid) {
-       case 1:
-               puts("A0\n");
+       case SOC_88F6820_ID:
+               puts("MV88F6820-");
                break;
-       case 2:
-               puts("B0\n");
+       case SOC_88F6828_ID:
+               puts("MV88F6828-");
                break;
        default:
-               puts("??\n");
+               puts("Unknown-");
                break;
        }
 
+       if (mvebu_soc_family() == MVEBU_SOC_AXP) {
+               switch (revid) {
+               case 1:
+                       puts("A0\n");
+                       break;
+               case 2:
+                       puts("B0\n");
+                       break;
+               default:
+                       printf("?? (%x)\n", revid);
+                       break;
+               }
+       }
+
+       if (mvebu_soc_family() == MVEBU_SOC_A38X) {
+               switch (revid) {
+               case MV_88F68XX_Z1_ID:
+                       puts("Z1\n");
+                       break;
+               case MV_88F68XX_A0_ID:
+                       puts("A0\n");
+                       break;
+               default:
+                       printf("?? (%x)\n", revid);
+                       break;
+               }
+       }
+
        return 0;
 }
 #endif /* CONFIG_DISPLAY_CPUINFO */
@@ -145,11 +190,13 @@ int arch_cpu_init(void)
         */
        mvebu_mbus_probe(NULL, 0);
 
-       /*
-        * Now the SDRAM access windows can be reconfigured using
-        * the information in the SDRAM scratch pad registers
-        */
-       update_sdram_window_sizes();
+       if (mvebu_soc_family() == MVEBU_SOC_AXP) {
+               /*
+                * Now the SDRAM access windows can be reconfigured using
+                * the information in the SDRAM scratch pad registers
+                */
+               update_sdram_window_sizes();
+       }
 
        /*
         * Finally the mbus windows can be configured with the
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h 
b/arch/arm/mach-mvebu/include/mach/soc.h
index f3e0398..212948f 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -12,6 +12,13 @@
 #define _MVEBU_SOC_H
 
 #define SOC_MV78460_ID         0x7846
+#define SOC_88F6810_ID         0x6810
+#define SOC_88F6820_ID         0x6820
+#define SOC_88F6828_ID         0x6828
+
+/* A38x revisions */
+#define MV_88F68XX_Z1_ID       0x0
+#define MV_88F68XX_A0_ID       0x4
 
 /* TCLK Core Clock definition */
 #ifndef CONFIG_SYS_TCLK
-- 
2.3.3

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