The prefix PCH was taken from ivybridge port. However Queensbay
platform official document does not mention PCH. It is composed
of TunnelCreek processor and Topcliff IOH chipset. For accuracy,
avoid using PCH prefix in the macro.
Signed-off-by: Bin Meng <bmeng...@gmail.com>
---
arch/x86/cpu/queensbay/tnc.c | 4 ++--
arch/x86/include/asm/arch-queensbay/tnc.h | 3 +--
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/x86/cpu/queensbay/tnc.c b/arch/x86/cpu/queensbay/tnc.c
index 30ab725..ac276d5 100644
--- a/arch/x86/cpu/queensbay/tnc.c
+++ b/arch/x86/cpu/queensbay/tnc.c
@@ -16,9 +16,9 @@ static void unprotect_spi_flash(void)
{
u32 bc;
- bc = pci_read_config32(PCH_LPC_DEV, 0xd8);
+ bc = pci_read_config32(TNC_LPC, 0xd8);
bc |= 0x1; /* unprotect the flash */
- pci_write_config32(PCH_LPC_DEV, 0xd8, bc);
+ pci_write_config32(TNC_LPC, 0xd8, bc);
}
int arch_cpu_init(void)
diff --git a/arch/x86/include/asm/arch-queensbay/tnc.h
b/arch/x86/include/asm/arch-queensbay/tnc.h
index 67c5e05..10ea51d 100644
--- a/arch/x86/include/asm/arch-queensbay/tnc.h
+++ b/arch/x86/include/asm/arch-queensbay/tnc.h
@@ -9,7 +9,6 @@
#include <pci.h>
-/* PCI Configuration Space (D31:F0): LPC */
-#define PCH_LPC_DEV PCI_BDF(0, 0x1f, 0)
+#define TNC_LPC PCI_BDF(0, 31, 0)
#endif /* _X86_ARCH_TNC_H_ */
--
1.8.2.1
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