stv0991 has cadence qspi controller for flash interfacing, this
patch configures the device pads & clock for the controller.
Signed-off-by: Vikas Manocha <vikas.mano...@st.com>
---
Changes in v4: none
Changes in v3: Rebased to spi-next-dev
Changes in v2:
- removed checkpatch.pl error.
arch/arm/cpu/armv7/stv0991/clock.c | 4 +++-
arch/arm/cpu/armv7/stv0991/pinmux.c | 5 +++++
arch/arm/include/asm/arch-stv0991/stv0991_cgu.h | 15 +++++++++++++++
arch/arm/include/asm/arch-stv0991/stv0991_creg.h | 9 +++++++++
arch/arm/include/asm/arch-stv0991/stv0991_periph.h | 2 ++
board/st/stv0991/stv0991.c | 8 ++++++++
6 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/stv0991/clock.c
b/arch/arm/cpu/armv7/stv0991/clock.c
index 70b8a8d..26c0d36 100644
--- a/arch/arm/cpu/armv7/stv0991/clock.c
+++ b/arch/arm/cpu/armv7/stv0991/clock.c
@@ -33,7 +33,9 @@ void clock_setup(int peripheral)
/* Clock selection for ethernet tx_clk & rx_clk*/
writel((readl(&stv0991_cgu_regs->eth_ctrl) & ETH_CLK_MASK)
| ETH_CLK_CTRL, &stv0991_cgu_regs->eth_ctrl);
-
+ break;
+ case QSPI_CLOCK_CFG:
+ writel(QSPI_CLK_CTRL, &stv0991_cgu_regs->qspi_freq);
break;
default:
break;
diff --git a/arch/arm/cpu/armv7/stv0991/pinmux.c
b/arch/arm/cpu/armv7/stv0991/pinmux.c
index 1d086a2..24c67fa 100644
--- a/arch/arm/cpu/armv7/stv0991/pinmux.c
+++ b/arch/arm/cpu/armv7/stv0991/pinmux.c
@@ -55,6 +55,11 @@ int stv0991_pinmux_config(int peripheral)
ETH_M_VDD_CFG, &stv0991_creg->vdd_pad1);
break;
+ case QSPI_CS_CLK_PAD:
+ writel((readl(&stv0991_creg->mux13) & FLASH_CS_NC_MASK) |
+ CFG_FLASH_CS_NC, &stv0991_creg->mux13);
+ writel((readl(&stv0991_creg->mux13) & FLASH_CLK_MASK) |
+ CFG_FLASH_CLK, &stv0991_creg->mux13);
default:
break;
}
diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
b/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
index ddcbb57..f0045f3 100644
--- a/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
+++ b/arch/arm/include/asm/arch-stv0991/stv0991_cgu.h
@@ -113,4 +113,19 @@ struct stv0991_cgu_regs {
#define ETH_CLK_CTRL (ETH_CLK_RX_EXT_PHY << RX_CLK_SHIFT \
| ETH_CLK_TX_EXT_PHY)
+/* CGU qspi clock */
+#define DIV_HCLK1_SHIFT 9
+#define DIV_CRYP_SHIFT 6
+#define MDIV_QSPI_SHIFT 3
+
+#define CLK_QSPI_OSC 0
+#define CLK_QSPI_MCLK 1
+#define CLK_QSPI_PLL1 2
+#define CLK_QSPI_PLL2 3
+
+#define QSPI_CLK_CTRL (3 << DIV_HCLK1_SHIFT \
+ | 1 << DIV_CRYP_SHIFT \
+ | 0 << MDIV_QSPI_SHIFT \
+ | CLK_QSPI_OSC)
+
#endif
diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_creg.h
b/arch/arm/include/asm/arch-stv0991/stv0991_creg.h
index c804eb5..737c952 100644
--- a/arch/arm/include/asm/arch-stv0991/stv0991_creg.h
+++ b/arch/arm/include/asm/arch-stv0991/stv0991_creg.h
@@ -49,6 +49,15 @@ struct stv0991_creg {
u32 vdd_comp1; /* offset 0x400 */
};
+/* CREG MUX 13 register */
+#define FLASH_CS_NC_SHIFT 4
+#define FLASH_CS_NC_MASK ~(7 << FLASH_CS_NC_SHIFT)
+#define CFG_FLASH_CS_NC (0 << FLASH_CS_NC_SHIFT)
+
+#define FLASH_CLK_SHIFT 0
+#define FLASH_CLK_MASK ~(7 << FLASH_CLK_SHIFT)
+#define CFG_FLASH_CLK (0 << FLASH_CLK_SHIFT)
+
/* CREG MUX 12 register */
#define GPIOC_30_MUX_SHIFT 24
#define GPIOC_30_MUX_MASK ~(1 << GPIOC_30_MUX_SHIFT)
diff --git a/arch/arm/include/asm/arch-stv0991/stv0991_periph.h
b/arch/arm/include/asm/arch-stv0991/stv0991_periph.h
index f728c83..725da83 100644
--- a/arch/arm/include/asm/arch-stv0991/stv0991_periph.h
+++ b/arch/arm/include/asm/arch-stv0991/stv0991_periph.h
@@ -18,6 +18,7 @@ enum periph_id {
UART_GPIOC_30_31 = 0,
UART_GPIOB_16_17,
ETH_GPIOB_10_31_C_0_4,
+ QSPI_CS_CLK_PAD,
PERIPH_ID_I2C0,
PERIPH_ID_I2C1,
PERIPH_ID_I2C2,
@@ -39,6 +40,7 @@ enum periph_id {
enum periph_clock {
UART_CLOCK_CFG = 0,
ETH_CLOCK_CFG,
+ QSPI_CLOCK_CFG,
};
#endif /* __ASM_ARM_ARCH_PERIPH_H */
diff --git a/board/st/stv0991/stv0991.c b/board/st/stv0991/stv0991.c
index 09f973f..add1ce1 100644
--- a/board/st/stv0991/stv0991.c
+++ b/board/st/stv0991/stv0991.c
@@ -55,12 +55,20 @@ int board_eth_enable(void)
return 0;
}
+int board_qspi_enable(void)
+{
+ stv0991_pinmux_config(QSPI_CS_CLK_PAD);
+ clock_setup(QSPI_CLOCK_CFG);
+ return 0;
+}
+
/*
* Miscellaneous platform dependent initialisations
*/
int board_init(void)
{
board_eth_enable();
+ board_qspi_enable();
return 0;
}
--
1.7.9.5
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