On Thursday 23 July 2015 07:08 PM, Ivan Khoronzhuk wrote: > > > On 23.07.15 15:43, Mugunthan V N wrote: >> On Thursday 23 July 2015 04:46 PM, Ivan Khoronzhuk wrote: >>> Hi, Mugunthan >>> >>> You are right, phy mode is a board property. >>> But just for clarifying, does Ethernet SS, which contains SGMII >>> on board, support another i/f mode except SGMII? Can it work >>> w/o SerDes? >> >> There is a upcoming SoC (K2E) using the same IP with RGMII phy >> connected. So the IP is capable of supporting multiple phy modes. >> >> Regards >> Mugunthan V N >> > > Then I would ask you to add it in commit message. > Also, if it can work in RGMII mode, could you please check if a > following errata doesn't affect you configuration. > This is only for Marvell phys, and if it's your case, it be good, > probably, to extend it`s impact on RGMII mode also. > > net: phy: marvell: add errata w/a for 88E151* chips > 35fa0dda0ccee8075b1ef8922e930d5dcdea9f5e
It uses Micrel phy. Regards Mugunthan V N _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot